Yongpan Liu

According to our database1, Yongpan Liu authored at least 121 papers between 2005 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization.
IEEE Trans. on Circuits and Systems, 2019

Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs.
IEEE Trans. on Circuits and Systems, 2019

Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

An N-way group association architecture and sparse data group association load balancing algorithm for sparse CNN accelerators.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors.
IEEE Trans. VLSI Syst., 2018

Avoiding Data Inconsistency in Energy Harvesting Powered Embedded Systems.
ACM Trans. Design Autom. Electr. Syst., 2018

Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors.
IEEE Micro, 2018

Efficient energy management by exploiting retention state for self-powered nonvolatile processors.
Journal of Systems Architecture - Embedded Systems Design, 2018

Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

An extensible system simulator for intermittently-powered multiple-peripheral IoT devices.
Proceedings of the 6th International Workshop on Energy Harvesting & Energy-Neutral Sensing Systems, 2018

Prototyping Energy Harvesting Powered Systems with Nonvolatile Processor (Invited Paper).
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

A Dual-Threshold Scheme Along with Security Reinforcement for Energy Efficient Nonvolatile Processors.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Time Stamp Based Scheduling for Energy Harvesting Systems with Hybrid Nonvolatile Hardware Support.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Reliability and Security in Non-volatile Processors, Two Sides of the Same Coin.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Live Demonstration: A self-powered ultraviolet radiation monitoring platform based on nonvolatile processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A collaborative defense against wear out attacks in non-volatile processors.
Proceedings of the 55th Annual Design Automation Conference, 2018

Dual-threshold directed execution progress maximization for nonvolatile processors.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

An Investigation on Inter-degeneration Effect in Body Channel Based Multi-node Wireless Power Transfer.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing.
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
CP-FPGA: Energy-Efficient Nonvolatile FPGA With Offline/Online Checkpointing Optimization.
IEEE Trans. VLSI Syst., 2017

DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes.
IEEE Trans. VLSI Syst., 2017

Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems.
ACM Trans. Embedded Comput. Syst., 2017

Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes.
IEEE Trans. on Circuits and Systems, 2017

A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications.
IEEE Trans. on Circuits and Systems, 2017

Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops.
IEEE Trans. on Circuits and Systems, 2017

Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Data Backup Optimization for Nonvolatile SRAM in Energy Harvesting Sensor Nodes.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

A General Framework for Hardware Trojan Detection in Digital Circuits by Statistical Learning Algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed.
J. Solid-State Circuits, 2017

A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors.
J. Solid-State Circuits, 2017

Multisource Indoor Energy Harvesting for Nonvolatile Processors.
IEEE Design & Test, 2017

Retention state-enabled and progress-driven energy management for self-powered nonvolatile processors.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Incidental computing on IoT nonvolatile processors.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

CNN-based pattern recognition on nonvolatile IoT platform for smart ultraviolet monitoring: (Invited paper).
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Nonvolatile processors: Why is it trending?
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture.
Proceedings of the 54th Annual Design Automation Conference, 2017

Retention state-aware energy management for efficient nonvolatile processors: work-in-progress.
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017

Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

'The danger of sleeping', an exploration of security in non-volatile processors.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016
A C2RTL Framework Supporting Partition, Parallelization, and FIFO Sizing for Streaming Applications.
ACM Trans. Design Autom. Electr. Syst., 2016

Wear-Leveling Aware Page Management for Non-Volatile Main Memory on Embedded Systems.
IEEE Trans. Multi-Scale Computing Systems, 2016

A Unified Methodology for Designing Hardware Random Number Generators Based on Any Probability Distribution.
IEEE Trans. on Circuits and Systems, 2016

Solar Power Prediction Assisted Intra-task Scheduling for Nonvolatile Sensor Nodes.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Storage-Less and Converter-Less Photovoltaic Energy Harvesting With Maximum Power Point Tracking for Internet of Things.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power.
IEEE Micro, 2016

Design of nonvolatile processors and applications.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

A compare-and-select error tolerant scheme for nonvolatile processors.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

SATS: An Ultra-Low Power Time Synchronization for Solar Energy Harvesting WSNs.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Multi-source in-door energy harvesting for non-volatile processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Dynamic converter reconfiguration for near-threshold non-volatile processors using in-door energy harvesting.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Performance-aware task scheduling for energy harvesting nonvolatile processors considering power switching overhead.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Accurate personal ultraviolet dose estimation with multiple wearable sensors.
Proceedings of the 13th IEEE International Conference on Wearable and Implantable Body Sensor Networks, 2016

CP-FPGA: Computation data-aware software/hardware co-design for nonvolatile FPGAs based on checkpointing techniques.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Performance-centric register file design for GPUs using racetrack memory.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

NVPsim: A simulator for architecture explorations of nonvolatile processors.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications.
IEEE Micro, 2015

Multistage Function Speculation Adders.
IEICE Transactions, 2015

Modular Performance Analysis of Energy-Harvesting Real-Time Networked Systems.
Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Design exploration of inrush current aware controller for nonvolatile processor.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Leveraging emerging nonvolatile memory in high-level synthesis with loop transformations.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

An energy-efficient heterogeneous dual-core processor for Internet of Things.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Hi-fi playback: tolerating position errors in shift operations of racetrack memory.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Dynamic Machine Learning Based Matching of Nonvolatile Processor Microarchitecture to Harvested Energy Profile.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Architecture exploration for ambient energy harvesting nonvolatile processors.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Multi-source energy harvesting management and optimization for non-volatile processors.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

Software assisted non-volatile register reduction for energy harvesting based cyber-physical system.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

From device to system: cross-layer design exploration of racetrack memory.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Ambient energy harvesting nonvolatile processors: from circuit to system.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Compiler directed automatic stack trimming for efficient non-volatile processors.
Proceedings of the 52nd Annual Design Automation Conference, 2015

A STT-RAM-based low-power hybrid register file for GPGPUs.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Self-powered wearable sensor node: Challenges and opportunities.
Proceedings of the 2015 International Conference on Compilers, 2015

Nonvolatile memory allocation and hierarchy optimization for high-level synthesis.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
PaCC: A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors.
IEEE Trans. VLSI Syst., 2014

A high-efficiency dual-channel photovoltaic power system for nonvolatile sensor nodes.
Proceedings of the IEEE Non-Volatile Memory Systems and Applications Symposium, 2014

Register allocation for hybrid register architecture in nonvolatile processors.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Intra-task scheduling for storage-less and converter-less solar-powered nonvolatile sensor nodes.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Storage-less and converter-less maximum power point tracking of photovoltaic cells for a nonvolatile microprocessor.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors.
Proceedings of the Design, Automation and Test in Europe, 2013

Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications.
Proceedings of the Design, Automation and Test in Europe, 2013

Optimal partition with block-level parallelization in C-to-RTL synthesis for streaming applications.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Lifetime-Aware Battery Allocation for Wireless Sensor Network under Cost Constraints.
IEICE Transactions, 2012

A low-complexity symbol-level differential detection scheme for IEEE 802.15.4 O-QPSK signals.
Proceedings of the International Conference on Wireless Communications and Signal Processing, 2012

Utilizing PCM for Energy Optimization in Embedded Systems.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

An energy harvesting nonvolatile sensor node and its application to distributed moving object detection.
Proceedings of the 11th International Conference on Information Processing in Sensor Networks (co-located with CPS Week 2012), 2012

A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A compression-based area-efficient recovery architecture for nonvolatile processors.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A hierarchical C2RTL framework for FIFO-connected stream applications.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
An Energy Efficient Sensor Network Processor with Latency-Aware Adaptive Compression.
IEICE Transactions, 2011

Design methodology of multistage time-domain logic speculation circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Evaluation of Tunable Data Compression in Energy-Aware Wireless Sensor Networks.
Sensors, 2010

Temperature-Aware Leakage Estimation Using Piecewise Linear Power Models.
IEICE Transactions, 2010

Lightweight Precision-Adaptive Time Synchronization in Wireless Sensor Networks.
IEICE Transactions, 2010

Design methodology of variable latency adders with multistage function speculation.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009
Battery allocation for wireless sensor network lifetime maximization under cost constraints.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Energy efficient architecture of sensor network node based on compression accelerator.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A Hybrid Genetic Algorithm with Critical Primary Inputs Sharing and Minor Primary Inputs Bits Climbing for Circuit Maximum Power Estimation.
Proceedings of the Third International Conference on Natural Computation, 2007

Accurate temperature-dependent integrated circuit leakage power estimation is easy.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Genetic Algorithm Based Fine-Grain Sleep Transistor Insertion Technique for Leakage Optimization.
Proceedings of the Advances in Natural Computation, Second International Conference, 2006

Techniques of Power-gating to Kill Sub-Threshold Leakage.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms.
Proceedings of the Advances in Natural Computation, First International Conference, 2005


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