Xin Wang
Orcid: 0000-0002-1727-0686Affiliations:
- Ghent University, IDLab Design Group, Gent, Belgium
- Fudan University, PhotonIC Technologies Inc., Shanghai, China (former)
According to our database1,
Xin Wang authored at least 12 papers
between 2013 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2026
A Duty-Cycle Switching 30-Gb/s Burst-Mode CDR With 1.6-ns Locking Time in 28-nm CMOS.
IEEE J. Solid State Circuits, January, 2026
DyPNet-MSC: Dynamic Bandwidth Allocation in Photonic Network-on-Wafer GPU Architectures.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2026
2025
A Co-Designed DC-Coupled 30-Gbps Burst-Mode Receiver and CDR with 3.2-ns Locking Time for Fast Optical Switching.
Proceedings of the European Conference on Optical Communications, 2025
60 Gbaud NRZ Transmission with 0.94 PJ/b Direct-Drive Optical Transmitter Using SM 1060 NM VCSEL Over 5 KM SMF.
Proceedings of the European Conference on Optical Communications, 2025
An All-Silicon 4x56 Gbit/s NRZ, 1 pJ/bit Optical Receiver with Ge-on-Si PDs and 28nm CMOS TIA Array.
Proceedings of the European Conference on Optical Communications, 2025
2023
2022
Co-designed electro-optical integrated frontend circuits for high speed transceivers.
Proceedings of the 2022 27th OptoElectronics and Communications Conference (OECC) and 2022 International Conference on Photonics in Switching and Computing (PSC), 2022
2020
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020
2019
A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
2018
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018
2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013