Jianxu Ma

According to our database, Jianxu Ma authored at least 3 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS.

Juncheng Wang, Quan Pan, Yajie Qin, Xuefeng Chen, Shang Hu, Rui Bai, Xin Wang, Yaxin Cai, Tao Xia, Yuanxi Zhang, Jianxu Ma, Nan Qi, Patrick Yin Chiang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018

A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS.

Juncheng Wang, Xuefeng Chen, Shang Hu, Yaxin Cai, Rui Bai, Xin Wang, Yuanxi Zhang, Shenglong Zhuo, Chang Liu, Bozhi Yin, Jianxu Ma, Hao Yan, Jiangao Xuan, Milton Lu, Tao Xia, Nan Qi, Patrick Yin Chiang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects.

Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017