Xinwang Zhang

According to our database1, Xinwang Zhang authored at least 12 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
MMCNN: A Multi-branch Multi-scale Convolutional Neural Network for Motor Imagery Classification.
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2020

2018
A 0.1-5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS.
Microelectron. J., 2018

2017
An Interference-Robust Reconfigurable Receiver With Automatic Frequency-Calibrated LNA in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Flexible Continuous-Time Δ Σ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2015
A 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS.
Microelectron. J., 2015

A 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
-80dBm∼0dBm dynamic range, 30mV/dB detection sensitivity piecewise RSSI for SDR/CR receivers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A 0.1-5GHz flexible SDR receiver in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2012
A 0.1~4GHz receiver and 0.1~6GHz transmitter with reconfigurable 10~100MHz signal bandwidth in 65nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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