Yun Yin

According to our database1, Yun Yin authored at least 23 papers between 2012 and 2020.

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Bibliography

2020
A Broadband Switched-Transformer Digital Power Amplifier for Deep Back-Off Efficiency Enhancement.
IEEE J. Solid State Circuits, 2020

24.5 A 15b Quadrature Digital Power Amplifier with Transformer-Based Complex-Domain Power-Efficiency Enhancement.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Nonlinear Analytical Model for Switched-Capacitor Class-D RF Power Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Compact Transformer-Combined Polar/Quadrature Reconfigurable Digital Power Amplifier in 28-nm Logic LP CMOS.
IEEE J. Solid State Circuits, 2019

A Compact Dual-Band Digital Polar Doherty Power Amplifier Using Parallel-Combining Transformer.
IEEE J. Solid State Circuits, 2019

A Broadband Switched-Transformer Digital Power Amplifier for Deep Back-Off Efficiency Enhancement.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
Particle swarm optimised analysis of investment decision.
Cogn. Syst. Res., 2018

A compact dual-band digital doherty power amplifier using parallel-combining transformer for cellular NB-IoT applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A compact 2.4GHz polar/quadrature reconfigurable digital power amplifier in 28nm logic LP CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A 0.1-5.0 GHz SDR transmitter with current-mode power-mixer and self-calibration scheme in 65 nm CMOS.
Microelectron. J., 2017

A 1.0-3.0GHz LTE transmitter with CIM enhancement.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

ReRAM write circuit with dynamic uniform and small overshoot compliance current under PVT variations.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
A 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS.
IEEE J. Solid State Circuits, 2015

A 0.1-5.0GHz self-calibrated SDR transmitter with -62.6dBc CIM3 in 65nm CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 180nm CMOS wireless transceiver by utilizing guard band for narrowband IoT applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A Reconfigurable Dual-Mode CMOS Power Amplifier With Integrated T/R Switch for 0.1-1.5-GHz Multistandard Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 0.1-5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

An efficiency-enhanced 2.4GHz stacked CMOS power amplifier with mode switching scheme for WLAN applications.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

A fully-integrated reconfigurable dual-band transceiver for short range wireless communication in 180nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A 0.1-1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOS.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
A 0.1~4GHz receiver and 0.1~6GHz transmitter with reconfigurable 10~100MHz signal bandwidth in 65nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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