Yanhuan Liu
Orcid: 0009-0001-8460-8173
According to our database1,
Yanhuan Liu authored at least 11 papers
between 2017 and 2026.
Collaborative distances:
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Bibliography
2026
HALO: A heterogeneous accelerator for low-latency and energy-efficient edge LLM inference.
Future Gener. Comput. Syst., 2026
BitRed: Taming Non-Uniform Bit-Level Sparsity with a Programmable RISC-V ISA for DNN Acceleration.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026
2025
IEEE Trans. Parallel Distributed Syst., June, 2025
IEEE Comput. Archit. Lett., 2025
LightCacheRL: A Lightweight Reinforcement Learning Framework for Unified Cache Management.
Proceedings of the Network and Parallel Computing, 2025
2024
Multilayer Dataflow: Orchestrate Butterfly Sparsity to Accelerate Attention Computation.
CoRR, 2024
2023
Accelerating Convolutional Neural Networks by Exploiting the Sparsity of Output Activation.
IEEE Trans. Parallel Distributed Syst., December, 2023
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
2021
Distilling Bit-level Sparsity Parallelism for General Purpose Deep Learning Acceleration.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017