Zhihua Fan

Orcid: 0000-0002-5950-7370

According to our database1, Zhihua Fan authored at least 34 papers between 2006 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
AHASD: Asynchronous Heterogeneous Architecture for LLM Adaptive Drafting Speculative Decoding on Mobile Devices.
CoRR, April, 2026

A real-time edge SAR imaging acceleration architecture utilizing multi-level dataflow parallelism.
J. Syst. Archit., 2026

HALO: A heterogeneous accelerator for low-latency and energy-efficient edge LLM inference.
Future Gener. Comput. Syst., 2026

A<sup>2</sup>RT: Efficient Ray Tracing Accelerator with Approximate-Accurate Computing and Quantization.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

RISC-V ISA Extensions for Vectorized Unstructured Sparse SpMM in LLM Inference.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

BitRed: Taming Non-Uniform Bit-Level Sparsity with a Programmable RISC-V ISA for DNN Acceleration.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026

2025
A RISC-V Extended Infrastructure for CNNs Through Pipelined Computing and Data Dependence Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2025

GenCNN: A Partition-Aware Multi-Objective Mapping Framework for CNN Accelerators Based on Genetic Algorithm.
ACM Trans. Archit. Code Optim., September, 2025

DFU-E: A Dataflow Architecture for Edge DSP and AI Applications.
IEEE Trans. Parallel Distributed Syst., June, 2025

PANDA: Adaptive Prefetching and Decentralized Scheduling for Dataflow Architectures.
ACM Trans. Archit. Code Optim., June, 2025

Accelerating tensor multiplication by exploring hybrid product with hardware and software co-design.
J. Syst. Archit., 2025

LightCacheRL: A Lightweight Reinforcement Learning Framework for Unified Cache Management.
Proceedings of the Network and Parallel Computing, 2025

StreamDCIM: A Tile-based Streaming Digital CIM Accelerator with Mixed-stationary Cross-forwarding Dataflow for Multimodal Transformer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

FDHA: Fusion-Driven Heterogeneous Accelerator for Efficient Diffusion Model Inference.
Proceedings of the Euro-Par 2025: Parallel Processing, 2025

Accelerating Authenticated Block Ciphers via RISC-V Custom Cryptography Instructions.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

NFMap: Node Fusion Optimization for Efficient CGRA Mapping with Reinforcement Learning.
Proceedings of the Advanced Parallel Processing Technologies, 2025

2024
Improving Utilization of Dataflow Unit for Multi-Batch Processing.
ACM Trans. Archit. Code Optim., March, 2024

Multilayer Dataflow: Orchestrate Butterfly Sparsity to Accelerate Attention Computation.
CoRR, 2024

LeakageFreeSpec: Applying the Wiping Approach to Defend Against Transient Execution Attacks.
Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024

2023
Accelerating Convolutional Neural Networks by Exploiting the Sparsity of Output Activation.
IEEE Trans. Parallel Distributed Syst., December, 2023

Alleviating Transfer Latency in DataFlow Accelerator for DSP Applications.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

DFGC: DFG-aware NoC Control based on Time Stamp Prediction for Dataflow Architecture.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators.
Proceedings of the IEEE International Conference on High Performance Computing & Communications, 2023

Improving Utilization of Dataflow Architectures Through Software and Hardware Co-Design.
Proceedings of the Euro-Par 2023: Parallel Processing - 29th International Conference on Parallel and Distributed Computing, Limassol, Cyprus, August 28, 2023

2022
Characterization and Implementation of Radar System Applications on a Reconfigurable Dataflow Architecture.
IEEE Comput. Archit. Lett., 2022

A Routing-Aware Mapping Method for Dataflow Architectures.
Proceedings of the Network and Parallel Computing, 2022

A Loop Optimization Method for Dataflow Architecture.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

LRP: Predictive output activation based on SVD approach for CNN s acceleration.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Experimental Demonstration of Adaptive Optics Correction of the External Aberrations for Distributed Fiber Laser Array.
IEEE Access, 2021

2019
Augmented Reality Based Educational Design for Children.
Int. J. Emerg. Technol. Learn., 2019

2011
Metadata Distribution and Consistency Techniques for Large-Scale Cluster File Systems.
IEEE Trans. Parallel Distributed Syst., 2011

2008
Least visible path analysis in raster terrain.
Int. J. Geogr. Inf. Sci., 2008

2007
Max/Min Path Visual Coverage Problems in Raster Terrain.
Proceedings of the 10th International Conference on Computer-Aided Design and Computer Graphics, 2007

2006
Context-aware Caching for Wireless Internet Applications.
Proceedings of the 2006 IEEE International Conference on e-Business Engineering (ICEBE 2006), 2006


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