Yehya Nasser

According to our database, Yehya Nasser authored at least 11 papers between 2017 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

ML-Based Hardware Trojan Detection in AI Accelerators via Power Side-Channel Analysis.

AbdelSalam Baltagi, Yehya Nasser, Amer Baghdadi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2026

BERT-Inspired HT Localization on FPGA AI Accelerators.

AbdelSalam Baltagi, Yehya Nasser, Amer Baghdadi

Proceedings of the Design and Architecture for Signal and Image Processing, 2026

2025

Revealing Embedded System Behaviors: A Comparative Analysis of Power Consumption and Hardware Performance Counters.

Mohammed Mezaouli, Yehya Nasser, Samir Saoudi, Marc-Oliver Pahl

Proceedings of the Computer Security. ESORICS 2025 International Workshops, 2025

Power Consumption Analysis for Reverse Engineering Digital Modulation: A Novel Approach to Physical Layer Attacks on Communication Systems.

Pablo Pareja, Yehya Nasser, Ahmed Masmoudi, Sébastien Houcke

Proceedings of the Cybersecurity - 9th European Interdisciplinary Cybersecurity Conference, 2025

2024

On Diversity in Discriminative Neural Networks.

Brahim Oubaha, Claude Berrou, Xueyao Ji, Yehya Nasser, Raphaël Le Bidan

Proceedings of the 12th IEEE International Symposium on Signal, 2024

2023

Toward Hardware-Assisted Malware Detection Utilizing Explainable Machine Learning: A Survey.

Yehya Nasser, Mohamed Nassar

IEEE Access, 2023

2021

RTL to Transistor Level Power Modeling and Estimation Techniques for FPGA and ASIC: A Survey.

Yehya Nasser, Jordane Lorandel, Jean-Christophe Prévotet, Maryline Hélard

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020

NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning.

Yehya Nasser, Carlo Sau, Jean-Christophe Prévotet, Tiziana Fanni, Francesca Palumbo, Maryline Hélard, Luigi Raffo

ACM Trans. Design Autom. Electr. Syst., 2020

2019

NeuPow: artificial neural networks for power and behavioral modeling of arithmetic components in 45nm ASICs technology.

Yehya Nasser, Carlo Sau, Jean-Christophe Prévotet, Tiziana Fanni, Francesca Palumbo, Maryline Hélard, Luigi Raffo

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018

Power modeling on FPGA: a neural model for RT-level power estimation.

Yehya Nasser, Jean-Christophe Prévotet, Maryline Hélard

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017

Dynamic power estimation based on switching activity propagation.

Yehya Nasser, Jean-Christophe Prévotet, M. Heiard, Jordane Lorandel

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017