Yen-Hsiang Wang

According to our database1, Yen-Hsiang Wang authored at least 8 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012
A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications.
J. Solid-State Circuits, 2012

A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Modeling of a spherical robot driven by Omni wheels.
Proceedings of the International Conference on Machine Learning and Cybernetics, 2011

A 40-mW 7-bit 2.2-GS/s time-interleaved subranging ADC for low-power gigabit wireless communications in 65-nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
K-space reconstruction of magnetic resonance inverse imaging (K-InI) of human visuomotor systems.
NeuroImage, 2010


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