Mau-Chung Frank Chang

According to our database1, Mau-Chung Frank Chang authored at least 117 papers between 2002 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1996, "For pioneering work in processing technology for manufacturing heterojunction bipolar integrated circuits.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepages:

On csauthors.net:

Bibliography

2020
A Reconfigurable 64-Dimension K-Means Clustering Accelerator With Adaptive Overflow Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Bonsai: High-Performance Adaptive Merge Tree Sorting.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019
2018 IEEE Educational Activities Board Awards.
IEEE Trans. Educ., 2019

Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT).
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

A Millimeter-Wave CMOS Transceiver With Digitally Pre-Distorted PAM-4 Modulation for Contactless Communications.
IEEE J. Solid State Circuits, 2019

Built-In Self-Test/Repair Methodology for Multiband RF-Interconnected TSV 3D Integration.
IEEE Des. Test, 2019

A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

An FPGA-Based BWT Accelerator for Bzip2 Data Compression.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

Millimeter-Wave System-on-Chip Applications from Space Explorations to Contactless Connectivity.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

A Single Layer 3-D Touch Sensing System for Mobile Devices Application.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

A 20Gb/s 79.5mW 127GHz CMOS transceiver with digitally pre-distorted PAM-4 modulation for contactless communications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 2.6GS/s Spectrometer System in 65nm CMOS for Spaceborne Telescopic Sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
An R2R-DAC-Based Architecture for Equalization-Equipped Voltage-Mode PAM-4 Wireline Transmitter Design.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Capacitor-DAC-Based Technique For Pre-Emphasis-Enabled Multilevel Transmitters.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 2.3-mW 11-cm Range Bootstrapped and Correlated-Double-Sampling Three-Dimensional Touch Sensing Circuit for Mobile Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection.
IEEE J. Solid State Circuits, 2017

DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers.
IEEE J. Solid State Circuits, 2017

A Memristive Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT).
CoRR, 2017

A Streaming Accelerator for Deep Convolutional Neural Networks with Image and Feature Decomposition for Resource-limited System Applications.
CoRR, 2017

A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things.
CoRR, 2017

Terahertz systems-on-chip enabled by nano-IC technologies.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

Millimeter-Wave Field Experiments with Many Antenna Configurations for Indoor Multipath Environments.
Proceedings of the 2017 IEEE Globecom Workshops, Singapore, December 4-8, 2017, 2017

2016
An 8-Bit Compressive Sensing ADC With 4-GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology.
IEEE J. Solid State Circuits, 2016

A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2.1 An integrated 0.56THz frequency synthesizer with 21GHz locking range and -74dBc/Hz phase noise at 1MHz offset in 65nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

EE1: Class of 2025 - Where will be the best jobs?
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

The SMEM Seeding Acceleration for DNA Sequence Alignment.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Invited - Airtouch: a novel single layer 3D touch sensing system for human/mobile devices interactions.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Wireless Gigabit Data Telemetry for Large-Scale Neural Recording.
IEEE J. Biomed. Health Informatics, 2015

40-Gb/s 0.7-V 2: 1 MUX and 1: 2 DEMUX with Transformer-Coupled Technique for SerDes Interface.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Blocker-Tolerant Inductor-Less Wideband Receiver With Phase and Thermal Noise Cancellation.
IEEE J. Solid State Circuits, 2015

A low-PDP and low-area repeater using passive CTLE for on-chip interconnects.
Proceedings of the Symposium on VLSI Circuits, 2015

2.1 A highly linear inductorless wideband receiver with phase- and thermal-noise cancellation.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

6.7 A 2.3mW 11cm-range bootstrapped and correlated-double-sampling (BCDS) 3D touch sensor for mobile devices.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 2.2 GS/s 188mW spectrometer processor in 65nm CMOS for supporting low-power THz planetary instruments.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
An LTV Analysis of the Frequency Translational Noise-Cancelling Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection.
IEEE J. Solid State Circuits, 2014

CMOS (Sub)-mm-Wave System-on-Chip for exploration of deep space and outer planetary systems.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
A 10-Bit 2-GS/s DAC-DDFS-IQ-Controller Baseband Enabling a Self-Healing 60-GHz Radio-on-Chip.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Stream arbitration: Towards efficient bandwidth utilization for emerging on-chip interconnects.
ACM Trans. Archit. Code Optim., 2013

A 294 GHz 0.47mW caterpillar amplifier based transmitter in 65nm CMOS For THz data-links.
Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013

A 100Gb/s quad-rate transformer-coupled injection-locking CDR circuit in 65nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A CMOS Integrated W-band Passive Imager.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system.
ACM Trans. Archit. Code Optim., 2012

A Blocker-Tolerant, Noise-Cancelling Receiver Suitable for Wideband Wireless Applications.
IEEE J. Solid State Circuits, 2012

A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs.
IEEE J. Solid State Circuits, 2012

A Compact and Low Power 5-10 GHz Quadrature Local Oscillator for Cognitive Radio Applications.
IEEE J. Solid State Circuits, 2012

A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications.
IEEE J. Solid State Circuits, 2012

An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling.
IEEE J. Solid State Circuits, 2012

Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A blocker-tolerant wideband noise-cancelling receiver with a 2dB noise figure.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 60GHz on-chip RF-Interconnect with λ/4 coupler for 5Gbps bi-directional communication and multi-drop arbitration.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
CMOS Prescaler(s) With Maximum 208-GHz Dividing Speed and 37-GHz Time-Interleaved Dual-Injection Locking Range.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver.
IEEE J. Solid State Circuits, 2011

A 60 GHz High Gain Transformer-Coupled Differential Cascode Power Amplifier in 65 nm CMOS.
IEICE Trans. Electron., 2011

A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects.
IEICE Trans. Electron., 2011

CMOS receivers for active and passive mm-wave imaging.
IEEE Commun. Mag., 2011

RF/wireless-interconnect: The next wave of connectivity.
Sci. China Inf. Sci., 2011

183GHz 13.5mW/pixel CMOS regenerative receiver for mm-wave imaging applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 10b resistor-resistor-string DAC with current compensation for compact LCD driver ICs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

The DIMM tree architecture: A high bandwidth and scalable memory system.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

A 40-mW 7-bit 2.2-GS/s time-interleaved subranging ADC for low-power gigabit wireless communications in 65-nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

A 7Gb/s SC-FDE/OFDM MMSE equalizer for 60GHz wireless communications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

RF-Interconnect for Future Network-On-Chip.
Proceedings of the Low Power Networks-on-Chip., 2011

2010
A Fractional- PLL for Multiband (0.8-6 GHz) Communications Using Binary-Weighted D/A Differentiator and Offset-Frequency Δ-Σ Modulator.
IEEE J. Solid State Circuits, 2010

A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c TRX.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

D-band CMOS transmitter and receiver for multi-giga-bit/sec wireless data link.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
60 GHz CMOS Amplifiers Using Transformer-Coupling and Artificial Dielectric Differential Transmission Lines for Compact Design.
IEEE J. Solid State Circuits, 2009

Robust On-Chip Signaling by Staggered and Twisted Bundle.
IEEE Des. Test Comput., 2009

Multiband RF-interconnect for reconfigurable network-on-chip communications.
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009

A scalable micro wireless interconnect structure for CMPs.
Proceedings of the 15th Annual International Conference on Mobile Computing and Networking, 2009

2008
Compact Dual-Band Direct Conversion CMOS Transceiver.
Encyclopedia of Wireless and Mobile Communications, 2008

A 1-V 1.25-GS/S 8-Bit Self-Calibrated Flash ADC in 90-nm Digital CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A 600-MSPS 8-bit CMOS ADC Using Distributed Track-and-Hold With Complementary Resistor/Capacitor Averaging.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Delta-Sigma D/A Converter Using Binary- Weighted Digital-to-Analog Differentiator for Second-Order Mismatch Shaping.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems.
IEEE Trans. Computers, 2008

Terahertz CMOS Frequency Generator Using Linear Superposition Technique.
IEEE J. Solid State Circuits, 2008

A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases.
IEEE J. Solid State Circuits, 2008

Power reduction of CMP communication networks via RF-interconnects.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

324GHz CMOS Frequency Generator Using Linear Superposition Technique.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

RF interconnects for communications on-chip.
Proceedings of the 2008 International Symposium on Physical Design, 2008

Lower-Complexity Layered Belief-Propagation Decoding of LDPC Codes.
Proceedings of IEEE International Conference on Communications, 2008

CMP network-on-chip overlaid with multi-band RF-interconnect.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2007
Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Can RF Help CMOS Processors? [Topics in Circuits for Communications].
IEEE Commun. Mag., 2007

Two 10Gb/s/pin Low-Power Interconnect Methods for 3D ICs.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
A 60GHz CMOS VCO Using On-Chip Resonator with Embedded Artificial Dielectric for Size, Loss and Noise Reduction.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
CDMA/FDMA-interconnects for future ULSI communications.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Three-dimensional impedance engineering for mixed-signal system-on-chip applications.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A self-synchronized RF-interconnect for 3-dimensional integrated circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A simple DDS architecture with highly efficient sine function lookup table.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003
Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Reconfigurable interconnect for next generation systems.
Proceedings of the Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), 2002


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