Charles C. Chiang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2012

Accurate process-hotspot detection using critical design rule extraction.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Improved tangent space based distance metric for accurate lithographic hotspot classification.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

A distributed algorithm for layout geometry operations.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2009

The road to 3D EDA tool readiness.

[BibT_eX]

[DOI]

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Efficient range pattern matching algorithm for process-hotspot detection.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2008

Hotspot Based Yield Prediction with Consideration of Correlations.

[BibT_eX]

[DOI]

Qing Su

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

Design for Manufacturability and Yield for Nano-Scale CMOS

[BibT_eX]

[DOI]

Series on Integrated Circuits and Systems, Springer, ISBN: 978-1-4020-5188-3, 2007

Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

A New Flexible Algorithm for Random Yield Improvement.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Accurate detection for process-hotspots with vias and incomplete specification.

[BibT_eX]

[DOI]

Jingyu Xu

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

A methodology for fast and accurate yield factor estimation during global routing.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

DFM issues for 65nm and beyond.

[BibT_eX]

[DOI]

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations.

[BibT_eX]

[DOI]

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process.

[BibT_eX]

[DOI]

Jianfeng Luo

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Accurate modeling of substrate resistive coupling for floating substrates.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2006

A one-shot projection method for interconnects with process variations.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Efficient process-hotspot detection using range pattern matching.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

DFM: swimming upstream.

[BibT_eX]

[DOI]

Dan Page

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Time domain model order reduction by wavelet collocation method.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

An IC manufacturing yield model considering intra-die variations.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

EDA Challenges in Nano-scale Technology.

[BibT_eX]

[DOI]

Raul Camposano

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A Min-Variance Iterative Method for Fast Smart Dummy Feature Density Assignment in Chemical-Mechanical Polishing.

[BibT_eX]

[DOI]

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A layout dependent full-chip copper electroplating topography model.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Fast and efficient phase conflict detection and correction in standard-cell layouts.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only).

[BibT_eX]

[DOI]

Wen Yujie

Jiarong Tong

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

Bright-Field AAPSM Conflict Detection and Correction.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

A novel wavelet method for noise analysis of nonlinear circuits.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Frequency domain wavelet method with GMRES for large-scale linear circuit simulation.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Two-sided projection method in variational equation model order reduction of nonlinear circuits.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Routing resources consumption on M-arch and X-arch.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

Direct Nonlinear Order Reduction with Variational Analysis.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

Analog circuit behavioral modeling via wavelet collocation method with auto-companding.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Wirelength reduction by using diagonal wire.

[BibT_eX]

[DOI]

Qing Su

Ching-Shoei Chiang

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

1994

A weighted Steiner tree-based global router with simultaneous length and density minimization.

[BibT_eX]

[DOI]

Chak-Kuen Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

1991

An optimal algorithm for rectilinear steiner trees for channels with obstacles.

[BibT_eX]

[DOI]

C. K. Wong

Int. J. Circuit Theory Appl., 1991

On wiring overlap layouts.

[BibT_eX]

[DOI]

Proceedings of the First Great Lakes Symposium on VLSI, 1991

1990

Global routing based on Steiner min-max trees.

[BibT_eX]

[DOI]

Chak-Kuen Wong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

1989

A powerful global router: based on Steiner min-max trees.

[BibT_eX]

[DOI]