Yongdeok Cho

According to our database, Yongdeok Cho authored at least 4 papers between 2010 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

A 1.1 V 2y-nm 4.35 Gb/s/pin 8 Gb LPDDR4 Mobile Device With Bandwidth Improvement Techniques.

Keunsoo Song, Sangkwon Lee, Dongkyun Kim, Youngbo Shim, Sangil Park, Bokrim Ko, Duckhwa Hong, Yongsuk Joo, Wooyoung Lee, Yongdeok Cho, Wooyeol Shin, Jaewoong Yun, Hyengouk Lee, Jeonghun Lee, Eunryeong Lee, Namkyu Jang, Jaemo Yang, Haekang Jung, Joohwan Cho, Hyeongon Kim, Jinkook Kim

IEEE J. Solid State Circuits, 2015

2014

A 1.1V 2y-nm 4.35Gb/s/pin 8Gb LPDDR4 mobile device with bandwidth improvement techniques.

Keunsoo Song, Sangkwon Lee, Dongkyun Kim, Youngbo Shim, Sangil Park, Bokrim Ko, Duckhwa Hong, Yongsuk Joo, Wooyoung Lee, Yongdeok Cho, Wooyeol Shin, Jaewoong Yun, Hyengouk Lee, Jeonghun Lee, Eunryeong Lee, Jaemo Yang, Haekang Jung, Namkyu Jang, Joohwan Cho, Hyeongon Kim

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2011

A 32-Gb MLC NAND Flash Memory With Vth Endurance Enhancing Schemes in 32 nm CMOS.

Changhyuk Lee, Sok-Kyu Lee, Sunghoon Ahn, Jinhaeng Lee, Wonsun Park, Yongdeok Cho, Chaekyu Jang, Chulwoo Yang, Sanghwa Chung, In-Suk Yun, Byoungin Joo, Byoungkwan Jeong, Jeeyul Kim, Jeakwan Kwon, Hyunjong Jin, Yujong Noh, Jooyun Ha, Moonsoo Sung, Daeil Choi, Sanghwan Kim, Jeawon Choi, Taeho Jeon, Heejoung Park, Joong-Seob Yang, Yo-Hwan Koh

IEEE J. Solid State Circuits, 2011

2010

A 32Gb MLC NAND-flash memory with Vth-endurance-enhancing schemes in 32nm CMOS.

Changhyuk Lee, Sok-Kyu Lee, Sunghoon Ahn, Jinhaeng Lee, Wonsun Park, Yongdeok Cho, Chaekyu Jang, Chulwoo Yang, Sanghwa Chung, In-Suk Yun, Byoungin Joo, Byoungkwan Jeong, Jeeyul Kim, Jeakwan Kwon, Hyunjong Jin, Yujong Noh, Jooyun Ha, Moonsoo Sung, Daeil Choi, Sanghwan Kim, Jeawon Choi, Taeho Jeon, Joong-Seob Yang, Yo-Hwan Koh

Proceedings of the IEEE International Solid-State Circuits Conference, 2010