Yow-Tyng Nieh

Hua-Hsin Yeh

ACM Trans. Design Autom. Electr. Syst., 2015

2014

Leakage-power-aware clock period minimization.

[BibT_eX]

[DOI]

Hua-Hsin Yeh

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Low-power timing closure methodology for ultra-low voltage designs.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2009

Opposite-phase register switching for peak current minimization.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2009

2007

Clock skew scheduling with race conditions considered.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2007

A Fast Register Scheduling Approach to the Architecture of Multiple Clocking Domains.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 2007

Opposite-Phase Clock Tree for Peak Current Reduction.

[BibT_eX]

[DOI]

Sheng-Yu Hsu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

Clock Period Minimization with Minimum Delay Insertion.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

2006

Synthesis of nonzero clock skew circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

State re-encoding for peak current minimization.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

Fast multi-domain clock skew scheduling for peak current reduction.

[BibT_eX]

[DOI]

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Minimizing peak current via opposite-phase clock tree.

[BibT_eX]

[DOI]

Sheng-Yu Hsu

Proceedings of the 42nd Design Automation Conference, 2005

Race-condition-aware clock skew scheduling.

[BibT_eX]

[DOI]

Feng-Pin Lu

Proceedings of the 42nd Design Automation Conference, 2005

2003

Clock Period Minimization of Non-Zero Clock Skew Circuits.

[BibT_eX]

[DOI]