Chung-Han Chou

According to our database1, Chung-Han Chou authored at least 10 papers between 2010 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Making Aging Useful by Recycling Aging-induced Clock Skew.
ACM Trans. Design Autom. Electr. Syst., 2020

2019
Aging-aware chip health prediction adopting an innovative monitoring strategy.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Sensor-Based Time Speculation in the Presence of Timing Variability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017
Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

CN-SIM: A cycle-accurate full system power delivery noise simulator.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Skew Minimization With Low Power for Wide-Voltage-Range Multipower-Mode Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2013
On the futility of thermal through-silicon-vias.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

Low-power timing closure methodology for ultra-low voltage designs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2011
On the preconditioner of conjugate gradient method - A power grid simulation perspective.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010
Clock skew optimization considering complicated power modes.
Proceedings of the Design, Automation and Test in Europe, 2010


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