Yue Chen

Orcid: 0000-0001-8337-9367

According to our database1, Yue Chen authored at least 10 papers between 2016 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

On csauthors.net:

Bibliography

2022
A Cryo-CMOS Oscillator With an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A Fractional-N Digitally Intensive PLL Achieving 428-fs Jitter and <sub>pp</sub> Supply Ripple.
IEEE J. Solid State Circuits, 2022

2020
A Switched-Capacitor DC-DC Converter Powering an LC Oscillator to Achieve 85% System Peak Power Efficiency and -65dBc Spurious Tones.
IEEE Trans. Circuits Syst., 2020

Analysis and Design of Power Supply Circuits for RF Oscillators.
IEEE Trans. Circuits Syst., 2020

19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
A Supply Pushing Reduction Technique for LC Oscillators Based on Ripple Replication and Cancellation.
IEEE J. Solid State Circuits, 2019

2018
An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
A 3.5-6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH ΔΣ-TDC for Low In-Band Phase Noise.
IEEE J. Solid State Circuits, 2017

A 350-mV 2.4-GHz quadrature oscillator with nearly instantaneous start-up using series LC tanks.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
A 3.5-6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH ΔΣ TDC for low in-band phase noise.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016


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