Peng Chen

Affiliations:
  • University College Dublin, School of Electrical and Electronic Engineering, Ireland
  • Delft University of Technology, The Netherlands (former)


According to our database1, Peng Chen authored at least 11 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
An Active-Under-Coil RFDAC With Analog Linear Interpolation in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 0.7-V Sub-mW Type-II Phase-Tracking Bluetooth Low Energy Receiver in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Type-II Phase-Tracking Receiver.
IEEE J. Solid State Circuits, 2021

A Feedforward and Feedback Constant-Slope Digital-to-Time Converter in 28nm CMOS Achieving ≤ 0.12% INL/Range over >100mV Supply Range.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2019
A Low-Noise Fractional- ${N}$ Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications.
IEEE J. Solid State Circuits, 2019

A 31-µW, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS.
IEEE J. Solid State Circuits, 2019

2018
An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
A 15-μW, 103-fs step, 5-bit capacitor-DAC-based constant-slope digital-to-time converter in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
Exponential extended flash time-to-digital converter.
Proceedings of the Second International Conference on Event-based Control, 2016

2015
Fractional spur suppression in all-digital phase-locked loops.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs.
Proceedings of the ESSCIRC Conference 2015, 2015


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