Yutaro Ishigaki

According to our database, Yutaro Ishigaki authored at least 5 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2020

A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications.

Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda

IEEE J. Solid State Circuits, 2020

2019

A 20.5TOPS and 217.3GOPS/mm² Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications.

Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2015

An FPGA implementation of 3D numerical simulations on a 2D SIMD array processor.

Yutaro Ishigaki, Yoichi Tomioka, Tsugumichi Shibata, Hitoshi Kitazawa

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only).

Yutaro Ishigaki, Ning Li, Yoichi Tomioka, Akihiko Miyazaki, Hitoshi Kitazawa

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU.

Ryota Takasu, Yoichi Tomioka, Yutaro Ishigaki, Ning Li, Tsugumichi Shibata, Mamoru Nakanishi, Hitoshi Kitazawa

IEICE Trans. Electron., 2014