Zaid Al-bayati

According to our database, Zaid Al-bayati authored at least 11 papers between 2012 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Partitioning and Selection of Data Consistency Mechanisms for Multicore Real-Time Systems.

Zaid Al-bayati, Youcheng Sun, Haibo Zeng, Marco Di Natale, Qi Zhu, Brett H. Meyer

ACM Trans. Embed. Comput. Syst., 2019

2018

Mapping and Scheduling Mixed-Criticality Systems with On-Demand Redundancy.

Jonah Caplan, Zaid Al-bayati, Haibo Zeng, Brett H. Meyer

IEEE Trans. Computers, 2018

2017

Optimized Implementation of Multirate Mixed-Criticality Synchronous Reactive Models.

Qingling Zhao, Zaid Al-bayati, Zonghua Gu, Haibo Zeng

ACM Trans. Design Autom. Electr. Syst., 2017

2016

Fault-tolerant scheduling of multicore mixed-criticality systems under permanent failures.

Zaid Al-bayati, Brett H. Meyer, Haibo Zeng

Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

A four-mode model for efficient fault-tolerant mixed-criticality systems.

Zaid Al-bayati, Jonah Caplan, Brett H. Meyer, Haibo Zeng

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Task placement and selection of data consistency mechanisms for real-time multicore applications.

Zaid Al-bayati, Youcheng Sun, Haibo Zeng, Marco Di Natale, Qi Zhu, Brett H. Meyer

Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

Enhanced partitioned scheduling of Mixed-Criticality Systems on multicore platforms.

Zaid Al-bayati, Qingling Zhao, Ahmed Youssef, Haibo Zeng, Zonghua Gu

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2013

Multitask implementation of synchronous reactive models with Earliest Deadline First scheduling.

Zaid Al-bayati, Haibo Zeng, Marco Di Natale, Zonghua Gu

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

2012

Low power Wallace multiplier design based on wide counters.

Sa'ed Abed, Bassam Jamil Mohd, Zaid Al-bayati, Sahel Alouneh

Int. J. Circuit Theory Appl., 2012

Probabilistic model checking of clock domain crossing interfaces.

Zaid Al-bayati, Otmane Aït Mohamed, Yvon Savaria, Mounir Boukadoum

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

A novel hybrid FIFO asynchronous clock domain crossing interfacing method.

Zaid Al-bayati, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012