Zhangxiaowen Gong

According to our database, Zhangxiaowen Gong authored at least 6 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Sara Baghsorkhi, Josep Torrellas

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

SparseTrain: Leveraging Dynamic Sparsity in Software for Training DNNs on General-Purpose SIMD Processors.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas

Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019

SparseTrain: Leveraging Dynamic Sparsity in Training DNNs on General-Purpose SIMD Processors.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas

CoRR, 2019

2018

An empirical study of the effect of source-level loop transformations on compiler stability.

Zhangxiaowen Gong, Zhi Chen, Justin Josef Szaday, David C. Wong, Zehra Sura, Neftali Watkinson, Saeed Maleki, David A. Padua, Alexander V. Veidenbaum, Alexandru Nicolau, Josep Torrellas

Proc. ACM Program. Lang., 2018

2017

Using Hardware Counters to Predict Vectorization.

Neftali Watkinson, Aniket Shivam, Zhi Chen, Alexander V. Veidenbaum, Alexandru Nicolau, Zhangxiaowen Gong

Proceedings of the Languages and Compilers for Parallel Computing, 2017

LORE: A loop repository for the evaluation of compilers.

Zhi Chen, Zhangxiaowen Gong, Justin Josef Szaday, David C. Wong, David A. Padua, Alexandru Nicolau, Alexander V. Veidenbaum, Neftali Watkinson, Zehra Sura, Saeed Maleki, Josep Torrellas, Gerald DeJong

Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017