Houxiang Ji

According to our database, Houxiang Ji authored at least 12 papers between 2017 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

STYX: Exploiting SmartNIC Capability to Reduce Datacenter Memory Tax.

Houxiang Ji, Mark Mansi, Yan Sun, Yifan Yuan, Jinghan Huang, Reese Kuper, Michael M. Swift, Nam Sung Kim

Proceedings of the 2023 USENIX Annual Technical Conference, 2023

Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices.

Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2022

Graphite: optimizing graph neural networks on CPUs through cooperative software-hardware techniques.

Zhangxiaowen Gong, Houxiang Ji, Yao Yao, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Comparative Reasoning for Knowledge Graph Fact Checking.

Lihui Liu, Houxiang Ji, Jiejun Xu, Hanghang Tong

Proceedings of the IEEE International Conference on Big Data, 2022

Pinned loads: taming speculative loads in secure processors.

Zirui Neil Zhao, Houxiang Ji, Adam Morrison, Darko Marinov, Josep Torrellas

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2020

Speculation Invariance (InvarSpec): Faster Safe Execution Through Program Analysis.

Zirui Neil Zhao, Houxiang Ji, Mengjia Yan, Jiyong Yu, Christopher W. Fletcher, Adam Morrison, Darko Marinov, Josep Torrellas

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Sara S. Baghsorkhi, Josep Torrellas

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

SparseTrain: Leveraging Dynamic Sparsity in Software for Training DNNs on General-Purpose SIMD Processors.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas

Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019

SparseTrain: Leveraging Dynamic Sparsity in Training DNNs on General-Purpose SIMD Processors.

Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas

CoRR, 2019

HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing.

Houxiang Ji, Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

ReCom: An efficient resistive accelerator for compressed deep neural networks.

Houxiang Ji, Linghao Song, Li Jiang, Hai Helen Li, Yiran Chen

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Favorable Block First: A Comprehensive Cache Scheme to Accelerate Partial Stripe Recovery of Triple Disk Failure Tolerant Arrays.

Luyu Li, Houxiang Ji, Chentao Wu, Jie Li, Minyi Guo

Proceedings of the 46th International Conference on Parallel Processing, 2017