Zhimin Tang

According to our database1, Zhimin Tang authored at least 39 papers between 1990 and 2019.

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Bibliography

2019
PIM-WEAVER: A High Energy-efficient, General-purpose Acceleration Architecture for String Operations in Big Data Processing.
SUSCOM, 2019

Image Super-Resolution via Simplified Dense Network With Non-Degenerate Layers.
IEEE Access, 2019

C-MAP: Improving the Effectiveness of Mapping Method for CGRA by Reducing NoC Congestion.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

2018
A Pipelining Loop Optimization Method for Dataflow Architecture.
J. Comput. Sci. Technol., 2018

A Non-Stop Double Buffering Mechanism for Dataflow Architecture.
J. Comput. Sci. Technol., 2018

A joint residual network with paired ReLUs activation for image super-resolution.
Neurocomputing, 2018

High-Performance and Energy-Efficient Fault Tolerance Scheduling Algorithm Based on Improved TMR for Heterogeneous System.
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018

Optimizing the Efficiency of Data Transfer in Dataflow Architectures.
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018

SmarCo: An Efficient Many-Core Processor for High-Throughput Applications in Datacenters.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Optimizing network efficiency of dataflow architectures through dynamic packet merging.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

Compression artifact removal using multi-scale reshuffling convolutional network.
Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2018

2017

2016
Training restricted Boltzmann Machine with dynamic learning rate.
Proceedings of the 11th International Conference on Computer Science & Education, 2016

A framework for energy-efficient optimization on multi-cores.
Proceedings of the Seventh International Green and Sustainable Computing Conference, 2016

Memory partition for SIMD in streaming dataflow architectures.
Proceedings of the Seventh International Green and Sustainable Computing Conference, 2016

POSTER: An Optimization of Dataflow Architectures for Scientific Applications.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2013
An Efficient Parallel Mechanism for Highly-Debuggable Multicore Simulator.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2008
Chip Multithreaded Consistency Model.
J. Comput. Sci. Technol., 2008

2006
Microarchitecture and Performance Analysis of Godson-2 SMT Processor.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

2005
An energy efficient TLB design methodology.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

2004
A shared virtual memory network with fast remote direct memory access and message passing.
Proceedings of the 2004 IEEE International Conference on Cluster Computing (CLUSTER 2004), 2004

2003
A New Architecture of a Fast Floating-Point Multiplier.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003

2001
Load Balancing in Home-Based Software DSMS.
Int. J. Found. Comput. Sci., 2001

Optimizing Home-Based Software DSM Protocols.
Cluster Computing, 2001

2000
Using Confidence Interval to Summarize the Evaluating Results of DSM Systems.
J. Comput. Sci. Technol., 2000

1999
Where does the time go in software DSMs? - Experiences with JIAJIA.
J. Comput. Sci. Technol., 1999

Dynamic Computation Scheduling for Load Balancing in Home-Based Software DSMs.
Proceedings of the 1999 International Symposium on Parallel Architectures, 1999

Reducing System Overheads in Home-based Software DSMs.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

Dynamic Task Migration in Home-based Software DSM Systems.
Proceedings of the Eighth IEEE International Symposium on High Performance Distributed Computing, 1999

Adaptive Write Detection in Home-based Software DSMs.
Proceedings of the Eighth IEEE International Symposium on High Performance Distributed Computing, 1999

High Efficient Parallel Computation of Resonant Frequencies of Waveguide Loaded Cavities on JIAJIA Software DSMs.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999

JIAJIA: A Software DSM System Based on a New Cache Coherence Protocol.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999

Affinity-Based Self Scheduing for Software Shared Memory Systems.
Proceedings of the High Performance Computing, 1999

Write Detection in Home-Based Software DSMs.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1998
A lock-based cache coherence protocol for scope consistency.
J. Comput. Sci. Technol., 1998

A framework of memory consistency models.
J. Comput. Sci. Technol., 1998

1997
An Interaction of Coherence Protocols and Memory Consistency Models in DSM Systems.
Operating Systems Review, 1997

1995
A maximum time difference pipelined arithmetic unit based on CMOS gate array.
J. Comput. Sci. Technol., 1995

1990
Optimal Granularity of Grid Iteration Problems.
Proceedings of the 1990 International Conference on Parallel Processing, 1990


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