Zixuan Wang

Orcid: 0000-0002-5255-3462

Affiliations:
  • Nanjing University of Posts and Telecommunications, College of Integrated Circuit Science and Engineering, China
  • Southeast University, Nanjing, China (PhD 2014)


According to our database1, Zixuan Wang authored at least 14 papers between 2011 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
A low-power self-reference Class-C VCO with dual feedback loops.
Microelectron. J., 2026

A Compact Wide-Band RF Energy Harvesting Front-End Based on an On-Chip IMN with 51.78% Peak PCE.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

A 8-19-GHz Current-Reused Wideband LNA With Dual Transformer Feedback.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
Test and Diagnosis Strategies for Interchiplet Interconnects.
IEEE Trans. Instrum. Meas., 2025

Mismatch Analysis of DDCC Rectifier for 2.4GHz-band high-sensitive RF Energy Harvesting System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
A 16-MHz Crystal Oscillator With 17.5- μ s Start-Up Time Under 10<sup>4</sup>-ppm- Δ F Injection Using Automatic Phase-Error Correction.
IEEE J. Solid State Circuits, November, 2024

2023
A 16MHz X0 with 17.5μs Startup Time Under 10<sup>4</sup>ppm-ΔF Injection Using Automatic Phase-Error Correction Technique.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2015
A 2.4-GHz All-Digital PLL With a 1-ps Resolution 0.9-mW Edge-Interchanging-Based Stochastic TDC.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A Review of LC-Based Digitally Controlled Oscillator with High Frequency Resolution.
J. Circuits Syst. Comput., 2015

2014
A Review of CMOS Time-to-Digital Converter.
J. Circuits Syst. Comput., 2014

2013
A low-power high-speed true single phase clock divide-by-2/3 prescaler.
IEICE Electron. Express, 2013

A high-resolution stochastic time-to-digital converter with edge-interchange scheme.
IEICE Electron. Express, 2013

A MASH 1-1-1 ΔΣ time-to-digital converter based on two-stage time quantization.
IEICE Electron. Express, 2013

2011
A CMOS voltage controlled oscillator topology for suppression of flicker noise up-conversion.
IEICE Electron. Express, 2011


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