Abdelmajid Bouajila

According to our database, Abdelmajid Bouajila authored at least 10 papers between 2006 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2012

A low-overhead monitoring ring interconnect for MPSoC parameter optimization.

Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Applying ASoC to Multi-core Applications for Workload Management.

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Autonomic System on Chip Platform.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

2010

Towards Scalability and Reliability of Autonomic Systems on Chip.

Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele

Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010

A rapid prototyping system for error-resilient multi-processor systems-on-chip.

Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich

Proceedings of the Design, Automation and Test in Europe, 2010

2008

Learning Classifier Tables for Autonomic Systems on Chip.

Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf

Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008

2006

Organic Computing at the System on Chip Level.

Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel

Proceedings of the IFIP VLSI-SoC 2006, 2006

Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs.

Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele

Proceedings of the Biologically Inspired Cooperative Computing, 2006

An Architecture for Runtime Evaluation of SoC Reliability.

Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf

Proceedings of the 36. Jahrestagung der Gesellschaft für Informatik, 2006