Aditya Sankar Medury

Orcid: 0000-0002-4961-3188

According to our database1, Aditya Sankar Medury authored at least 9 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Engineering negative capacitance Fully Depleted Silicon-on-insulator FET for improved performance.
Microelectron. J., October, 2023

Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance.
Microelectron. J., 2023

2022
FE/PE/DE gate stack enabling improved analog performance in partially Junction-less NCFETs.
Microelectron. J., 2022

2018
An Intelligent Intersection.
CoRR, 2018

2016
Impact of carrier quantum confinement on the short channel effects of double-gate silicon-on-insulator FINFETs.
Microelectron. J., 2016

2015
Identification and estimation of latent group-level-effects in infrastructure performance modeling.
EURO J. Transp. Logist., 2015

BSIM-CMG: Standard FinFET compact model for advanced circuit design.
Proceedings of the ESSCIRC Conference 2015, 2015

2013
Incorporating Network Considerations into System-level Pavement Management Systems.
PhD thesis, 2013

2005
Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005


  Loading...