Adrian Marotzke

Orcid: 0000-0002-5253-881X

According to our database1, Adrian Marotzke authored at least 8 papers between 2020 and 2026.

Collaborative distances:

Timeline

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Bibliography

2026
Isochronous Fixed-Weight Sampling in Hardware.
IACR Cryptol. ePrint Arch., 2026

The PMP Snapshot Engine: Fast and Fault-Resilient PMP Reconfiguration for RISC-V.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
Multi-Partner Project: Securing Future Edge-AI Processors in Practice (CONVOLVE).
IACR Cryptol. ePrint Arch., 2025

Multi-Partner Project: Securing Future Edge-AI Processors in Practice (CONVOLVE).
Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024
Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

2023
Streamlined NTRU Prime on FPGA.
J. Cryptogr. Eng., June, 2023

Gate-Level Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Cryptol. ePrint Arch., 2023

2020
A Constant Time Full Hardware Implementation of Streamlined NTRU Prime.
Proceedings of the Smart Card Research and Advanced Applications, 2020


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