Ahmed Abdelaal
Orcid: 0000-0001-9724-5896
According to our database1,
Ahmed Abdelaal
authored at least 15 papers
between 2019 and 2025.
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Bibliography
2025
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2025
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Analysis of Dynamic Errors in Tri-level DACs for Continuous-Time Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A Direct Digitizing, 1MHz Bandwidth, 28fA/√Hz Current Sensing Front-End Based on a Mixed-Signal Integrator-Differentiator TIA in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025
A Calibration-free 80MHz CT DSM Using Dual Quantization and ISI Shuffler Achieving 106.2dB SFDR.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025
2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s Continuous Time Incremental Delta-Sigma ADC Utilizing Variable Bit Width Quantizer in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Comparative Study of ISI Errors in Different DAC Structures for CT Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019