Akira Jinguji

Orcid: 0000-0001-5691-3472

According to our database1, Akira Jinguji authored at least 15 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Many-core Architecture for an Ensemble Ternary Neural Network Toward High-Throughput Inference.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

A Light-Weight Vision Transformer Toward Near Memory Computation on an FPGA.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
Multilayer Perceptron Training Accelerator Using Systolic Array.
IEICE Trans. Inf. Syst., December, 2022

2021
Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs.
IEICE Trans. Inf. Syst., 2021

2020
Fast Monocular Depth Estimation on an FPGA.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

R2CNN: Recurrent Residual Convolutional Neural Network on FPGA.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Tiny On-Chip Memory Realization of Weight Sparseness Split-CNNs on Low-end FPGAs.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019
A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2019

FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

An FPGA-based Fine Tuning Accelerator for a Sparse CNN.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
An FPGA Realization of a Random Forest with <i>k</i>-Means Clustering Using a High-Level Synthesis Design.
IEICE Trans. Inf. Syst., 2018

An FPGA Realization of OpenPose Based on a Sparse Weight Convolutional Neural Network.
Proceedings of the International Conference on Field-Programmable Technology, 2018

2017
A Random Forest Using a Multi-valued Decision Diagram on an FPGA.
Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

2016
An acceleration of a random forest classification using Altera SDK for OpenCL.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016


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