Tomoya Fujii

According to our database1, Tomoya Fujii authored at least 13 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Practical Improvement and Performance Evaluation of Road Damage Detection Model using Machine Learning.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., September, 2023

Non-readily identifiable data collaboration analysis for multiple datasets including personal information.
Inf. Fusion, 2023

Hummingbird-bat hybrid wing by 3-D printing.
Proceedings of the IEEE International Conference on Robotics and Automation, 2023

Performance Evaluation of Detection Model for Road Surface Damage using YOLO.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

2022
Achieving Transparency in Distributed Machine Learning with Explainable Data Collaboration.
CoRR, 2022

2019
GUINNESS: A GUI Based Binarized Deep Neural Network Framework for Software Programmers.
IEICE Trans. Inf. Syst., 2019

2018
A Threshold Neuron Pruning for a Binarized Deep Neural Network on an FPGA.
IEICE Trans. Inf. Syst., 2018

A Study on Joint Trajectory Planning of Multilegged Robot with Redundant Degrees of Freedom Legs using the Screw Theory.
Proceedings of the International Symposium on Micro-NanoMechatronics and Human Science, 2018

An FPGA Realization of OpenPose Based on a Sparse Weight Convolutional Neural Network.
Proceedings of the International Conference on Field-Programmable Technology, 2018

A Lightweight YOLOv2: A Binarized CNN with A Parallel Support Vector Regression for an FPGA.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017
A demonstration of the GUINNESS: A GUI based neural NEtwork SyntheSizer for an FPGA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

A fully connected layer elimination for a binarizec convolutional neural network on an FPGA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

An FPGA Realization of a Deep Convolutional Neural Network Using a Threshold Neuron Pruning.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017


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