Alberto Allara

According to our database, Alberto Allara authored at least 6 papers between 1997 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2000

A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller.

Alberto Allara, Massimo Bombana, William Fornaciari, Fabio Salice

IEEE Des. Test Comput., 2000

1998

System-level performance estimation strategy for sw and hw.

Alberto Allara, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

A Model for System-Level Timed Analysis and Profiling.

Alberto Allara, William Fornaciari, Fabio Salice, Donatella Sciuto

Proceedings of the 1998 Design, 1998

ATM Cell Modelling using Objective VHDL.

Alberto Allara, Massimo Bombana, Patrizia Cavalloro, Wolfgang Nebel, Wolfram Putzke-Röming, Martin Radetzki

Proceedings of the ASP-DAC '98, 1998

1997

Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation.

Alberto Allara, S. Filipponi, William Fornaciari, Fabio Salice, Donatella Sciuto

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

A Flexible Model for Evaluating the Behavior of Hardware/Software Systems.

Alberto Allara, S. Filipponi, Fabio Salice, William Fornaciari, Donatella Sciuto

Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997