Carlo Brandolese

According to our database1, Carlo Brandolese authored at least 50 papers between 1998 and 2024.

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Bibliography

2024
Real-time automatic integrated monitoring of barn environment and dairy cattle behaviour: Technical implementation and evaluation on three commercial farms.
Comput. Electron. Agric., January, 2024

2022
Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach.
Microprocess. Microsystems, November, 2022

2021

2019
Accelerating Automotive Analytics: The M2DC Appliance Approach.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

2018
Exploring manycore architectures for next-generation HPC systems through the MANGO approach.
Microprocess. Microsystems, 2018

Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

An unsupervised approach for automotive driver identification.
Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018

2017
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Microprocess. Microsystems, 2017

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems, 2017


2016

Safe cooperative CPS: A V2I traffic management scenario in the SafeCOP project.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016


V2I Cooperation for Traffic Management with SafeCop.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Enabling HPC for QoS-sensitive applications: The MANGO approach.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Playful Supervised Smart Spaces (P3S) - A Framework for Designing, Implementing and Deploying Multisensory Play Experiences for Children with Special Needs.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
An optimal model to partition the evolution of periodic tasks in wireless sensor networks.
Proceedings of the Proceeding of IEEE International Symposium on a World of Wireless, 2014

2013
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration.
Microprocess. Microsystems, 2013

Optimal hibernation policies for energy efficient stateful operation in high-end wireless sensor nodes.
Proceedings of the IEEE 14th International Symposium on "A World of Wireless, 2013

Power Management Support to Optimal Duty-Cycling in Stateful Multitasking WSN.
Proceedings of the 12th IEEE International Conference on Trust, 2013

A bird's eye view on reinforcement learning approaches for power management in WSNs.
Proceedings of the 6th Joint IFIP Wireless and Mobile Networking Conference, 2013

A Formal Model for Optimal Autonomous Task Hibernation in Constrained Embedded Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Towards energy-efficient functional configuration in WSNs.
Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXploration.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Enabling ultra-low power operation in high-end wireless sensor networks nodes.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

Software energy optimization through fine-grained function-level voltage and frequency scaling.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
Software energy estimation based on statistical characterization of intermediate compilation code.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
A genetic approach for WSN lifetime maximization through dynamic linking and management.
Proceedings of the 7th ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, 2010

2009
A Framework for Compile-time and Run-time Management of Non-functional Aspects in WSNs Nodes.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Measurement, Analysis and Modeling of RTOS System Calls Timing.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Source-Level Estimation of Energy Consumption and Execution Time of Embedded Software.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
A New Framework for Design and Simulation of Complex Hardware/Software Systems.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006
Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC.
IEEE Trans. Computers, 2006

A Fast, Dynamic, Fine-Detail, Source Level Technique to Estimate the Energy Consumed by Embedded Software on Single-Issue Processor Cores.
J. Low Power Electron., 2006

2004
Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures.
Proceedings of the Integrated Circuit and System Design, 2004

Analysis and Modeling of Energy Reducing Source Code Transformations.
Proceedings of the 2004 Design, 2004

An area estimation methodology for FPGA based designs at systemc-level.
Proceedings of the 41th Design Automation Conference, 2004

Source-Level Models for Software Power Optimization.
Proceedings of the Ultra Low-Power Electronics and Design, 2004

2003
Library Functions Timing Characterization for Source-Level Analysis.
Proceedings of the 2003 Design, 2003

2002
Static power modeling of 32-bit microprocessors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

The Impact of Source Code Transformations on Software Power and Energy Consumption.
J. Circuits Syst. Comput., 2002

Modeling Assembly Instruction Timing in Superscalar Architectures.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

2001
Dynamic modeling of inter-instruction effects for execution time estimation.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001

An Assembly-Level Execution-Time Model for Pipelined Architectures.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Source-level execution time estimation of C programs.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

2000
A Multi-Level Strategy for Software Power Estimation.
Proceedings of the 13th International Symposium on System Synthesis, 2000

An instruction-level functionally-based energy estimation model for 32-bits microprocessors.
Proceedings of the 37th Conference on Design Automation, 2000

Energy estimation for 32-bit microprocessors.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

1998
System-level performance estimation strategy for sw and hw.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998


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