Alessio Antolini

Orcid: 0000-0003-0952-3839

According to our database1, Alessio Antolini authored at least 8 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

2023
Combined HW/SW Drift and Variability Mitigation for PCM-Based Analog In-Memory Computing for Neural Network Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

2022
Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring.
J. Comput. Civ. Eng., 2022

Phase-change memory cells characterization in an analog in-memory computing perspective.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Phase-Change Memory in Neural Network Layers with Measurements-based Device Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Nanowatt Clock and Data Recovery for Ultra-Low Power Wake-Up Based Receivers.
Proceedings of the 2020 International Conference on Embedded Wireless Systems and Networks, 2020


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