Antonio Gnudi
Orcid: 0000-0002-2186-3468Affiliations:
- University of Bologna, Italy
According to our database1,
Antonio Gnudi
authored at least 51 papers
between 1987 and 2023.
Collaborative distances:
Collaborative distances:
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Online presence:
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on zbmath.org
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on scopus.com
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on orcid.org
On csauthors.net:
Bibliography
2023
A Threshold Voltage Generator Circuit with Automatic Refresh and Dynamic Updating for Ultra-Low-Power Continuous-Time Comparators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
J. Comput. Civ. Eng., 2022
A 54.8-nW, 256-bit Codeword Temperature-Robust Wake-Up Receiver minimizing False Wake-Ups for Ultra-Low-Power IoT Systems.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A Clockless Temperature-Compensated Nanowatt Analog Front-End for Wake-Up Radios Based on a Band-Pass Envelope Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Proceedings of the 2020 International Conference on Embedded Wireless Systems and Networks, 2020
2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2018
Microelectron. Reliab., 2018
Microelectron. Reliab., 2018
Electrical characterization of epoxy-based molding compounds for next generation HV ICs in presence of moisture.
Microelectron. Reliab., 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 48th European Solid-State Device Research Conference, 2018
2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Performance study of strained III-V materials for ultra-thin body transistor applications.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
TCAD low-field mobility model for InGaAs UTB MOSFETs including quasi-ballistic corrections.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
Proceedings of the 45th European Solid State Device Research Conference, 2015
2014
A quasi 2D semianalytical model for the potential profile in hetero and homojunction tunnel FETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014
Proceedings of the 44th European Solid State Device Research Conference, 2014
Impact of crystallographic orientation and impurity scattering in Graphene-Base Heterojunction Transistors for Terahertz Operation.
Proceedings of the 44th European Solid State Device Research Conference, 2014
TCAD modeling of encapsulation layer in high-voltage, high-temperature operation regime.
Proceedings of the 44th European Solid State Device Research Conference, 2014
2013
Deterministic solution of the 1D Boltzmann transport equation: Application to the study of current transport in nanowire FETs.
Microelectron. J., 2013
Modeling and characterization of hot-carrier stress degradation in power MOSFETs (invited).
Proceedings of the European Solid-State Device Research Conference, 2013
Proceedings of the European Solid-State Device Research Conference, 2013
DC and small-signal numerical simulation of graphene base transistor for terahertz operation.
Proceedings of the European Solid-State Device Research Conference, 2013
Proceedings of the European Solid-State Device Research Conference, 2013
Proceedings of the European Solid-State Device Research Conference, 2013
2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
2011
Automatic Compensation of the Voltage Attenuation in 3-D Interconnection Based on Capacitive Coupling.
IEEE J. Solid State Circuits, 2011
Int. J. Circuit Theory Appl., 2011
2010
Quadrature VCOs based on direct second harmonic locking: Theoretical analysis and experimental validation.
Int. J. Circuit Theory Appl., 2010
2009
3D capacitive transmission of analog signals with automatic compensation of the voltage attenuation.
Proceedings of the 35th European Solid-State Circuits Conference, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
A Fully Parameterized Fem Model for Electromagnetic Optimization of an RF Mems Wafer Level Package
CoRR, 2008
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
2005
IEEE J. Solid State Circuits, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Quadrature VCO based on direct second harmonic locking.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
1998
VLSI Design, 1998
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
1993
Modeling impact ionization in a BJT by means of spherical harmonics expansion of the Boltzmann transport equation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
1992
1990
Eur. Trans. Telecommun., 1990
1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
1988
A new discretization strategy of the semiconductor equations comprising momentum and energy balance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
1987
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987