Ali Irturk

According to our database¹, Ali Irturk authored at least 17 papers between 2008 and 2013.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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2013

A FPGA design for high speed feature extraction from a compressed measurement stream.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

On the Complexity of Generating Gate Level Information Flow Tracking Logic.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2012

GPU acceleration of optical mapping algorithm for cardiac electrophysiology.

[BibT_eX]

[DOI]

Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

2011

Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Theoretical Fundamentals of Gate Level Information Flow Tracking.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Design and Implementation of an FPGA-Based Real-Time Face Recognition System.

[BibT_eX]

[DOI]

Janarbek Matai

Ali Irturk

Ryan Kastner

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Information flow isolation in I2C and USB.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

GUSTO: An automatic generation and optimization tool for matrix inversion architectures.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2010

Theoretical analysis of gate level information flow tracking.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

2009

GUSTO : general architecture design utility and synthesis tool for optimization.

[BibT_eX]

[DOI]

Ali Irturk

PhD thesis, 2009

Architectural optimization of decomposition algorithms for wireless communication systems.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE Wireless Communications and Networking Conference, 2009

Energy benefits of reconfigurable hardware for use in underwater sensor nets.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Xquasher: a tool for efficient computation of multiple linear expressions.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

2008

An FPGA Design Space Exploration Tool for Matrix Inversion Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on Application Specific Processors, 2008

Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks.

[BibT_eX]

[DOI]

Proceedings of the Third Workshop on Underwater Networks, 2008

Automatic generation of decomposition based matrix inversion architectures.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Design space exploration of a cooperative MIMO receiver for reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

Ali Irturk

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