Ali Mirzaeian

Orcid: 0000-0003-3266-6416

According to our database1, Ali Mirzaeian authored at least 13 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Adaptive-Gravity: A Defense Against Adversarial Samples.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021
AVATAR: NN-Assisted Variation Aware Timing Analysis and Reporting for Hardware Trojan Detection.
IEEE Access, 2021

Conditional Classification: A Solution for Computational Energy Reduction.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Diverse Knowledge Distillation (DKD): A Solution for Improving The Robustness of Ensemble Models Against Adversarial Attacks.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Learning Assisted Side Channel Delay Test for Detection of Recycled ICs.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Cluster-Based Partitioning of Convolutional Neural Networks, A Solution for Computational Energy and Complexity Reduction.
CoRR, 2020

Learning Diverse Latent Representations for Improving the Resilience to Adversarial Attacks.
CoRR, 2020

LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

NESTA: Hamming Weight Compression-Based Neural Proc. EngineAli Mirzaeian.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
NESTA: Hamming Weight Compression-Based Neural Proc. Engine.
CoRR, 2019

TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019


  Loading...