According to our database1, Amin Farshidi authored at least 12 papers between 2011 and 2019.
Legend:Book In proceedings Article PhD thesis Other
ISPD 2019 Initial Detailed Routing Contest and Benchmark with Advanced Routing Rules.
Proceedings of the 2019 International Symposium on Physical Design, 2019
A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015
Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
A new a priori net length estimation technique for integrated circuits using radial basis functions.
Comput. Electr. Eng., 2013
Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes.
Proceedings of the International Symposium on Physical Design, 2013
A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the International Workshop on System Level Interconnect Prediction, 2012
A pre-placement individual net length estimation model and an application for modern circuits.