André Zambanini

According to our database, André Zambanini authored at least 12 papers between 2018 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

2T1R Regulated Memristor Conductance Control Array Architecture for Neuromorphic Computing using 28nm CMOS Technology.

Neethu Kuriakose, Arun Ashok, Christian Grewing, André Zambanini, Stefan van Waasen

CoRR, May, 2025

Concept of a System-on-Chip Research Platform Benchmarking Interaction of Memristor-based Bio-inspired Computing Paradigms.

Christian Grewing, Arun Ashok, Sabitha Kusuma, Michael Schiek, Andre Zambanini, Stefan van Waasen

CoRR, May, 2025

Scalable 28nm IC implementation of coupled oscillator network featuring tunable topology and complexity.

S. Y. Neyaz, Arun Ashok, Michael Schiek, Christian Grewing, André Zambanini, Stefan van Waasen

CoRR, May, 2025

Self Clocked Digital LDO for Cryogenic Power Management in 22nm FDSOI with 98 Percent Efficiency.

Arun Ashok, A. Cabrera, S. Baje, André Zambanini, Kim Allinger, Andreas Bahr, Stefan van Waasen

CoRR, May, 2025

Modeling Chiplet-to-Chiplet (C2C) Communication for Chiplet-based Co-Design.

Fabian Schätzle, Carlos Falquez, Nam Ho, André Zambanini, Johannes Van Den Boom, Estela Suarez

Proceedings of the ISC High Performance 2025 Research Paper Proceedings (40th International Conference), 2025

2024

Voltage Reference and Voltage Regulator for the Cryogenic Performance Evaluation of the 22nm FDSOI Technology.

Alfonso R. Cabrera-Galicia, Arun Ashok, Patrick Vliex, Andre Kruth, André Zambanini, Stefan van Waasen

IEEE Open J. Circuits Syst., 2024

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array.

Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2-based Memristors.

M. Shamookh, Arun Ashok, Andre Zambanini, Anton Geläschus, Christian Grewing, Andreas Bahr, Stefan van Waasen

Proceedings of the 20th International Conference on Synthesis, 2024

Rapid Prototyping Platform for Integrated Circuits for Quantum Computing.

Jonas Mair, Sabitha Kusuma, Dennis Liebau, Lammert Duipmans, Lea Schreckenberg, Patrick Vliex, André Zambanini, Stefan van Waasen

Proceedings of the 20th International Conference on Synthesis, 2024

2023

A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology.

Alfonso Rafael Cabrera-Galicia, Arun Ashok, Patrick Vliex, Andre Kruth, Andre Zambanini, Stefan van Waasen

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2019

Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers.

C. Degenhardt, A. Artanov, Lotte Geck, Christian Grewing, Andre Kruth, Dennis Nielinger, Patrick Vliex, Andre Zambanini, Stefan van Waasen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Modeling and Simulation of Digital Phase-Locked Loop in Simulink.

Nina Parkalian, Markus Robens, Christian Grewing, Volker Christ, Dennis Liebau, P. Muralidharan, Dennis Nielinger, Ugur Yegin, Andre Zambanini, Stefan van Waasen

Proceedings of the 15th International Conference on Synthesis, 2018