Andreas C. Döring

Affiliations:
  • IBM Research Laboratory, Zurich
  • Medical University of Lübeck, Institute of Computer Engineering


According to our database1, Andreas C. Döring authored at least 30 papers between 1996 and 2021.

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Bibliography

2021
Towards a General Framework for ML-based Self-tuning Databases.
Proceedings of the EuroMLSys@EuroSys 2021, 2021

2017
Objective, innovation and impact of the energy-efficient dome microdatacenter.
Proceedings of the 2017 International Conference on Advances in Computing, 2017

2015
A Record-Setting Microserver: A Data-Centre in a Shoebox.
ERCIM News, 2015

Power measurements and cooling of the DOME 28nm 1.8GHz 24-thread ppc64 μServer compute node.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014
Dual function heat-spreading and performance of the IBM/ASTRON DOME 64-bit μServer demonstrator.
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

Experimental Generation of Configurable Circuits for Rotationally Symmetric Functions.
Proceedings of the ARCS 2014, 2014

2013
Determination of One-Way Bandwidth of Cellular Automata Using Binary Decision Diagrams.
J. Cell. Autom., 2013

Monitoring and Controlling System for Microservers.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

The DOME embedded 64 bit microserver demonstrator.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

2011
Visualization of simulation results for the PERCS Hub chip performance verification.
Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques, 2011

2010
Analysis of network topologies and fault-tolerant routing algorithms using binary decision diagrams.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Concepts and Experiments for Optimizing Wide-Input Streaming CRC Circuits.
Proceedings of the ARCS '10, 2010

2006
Impact of Coprocessors on a Multithreaded Processor Design Using Prioritized Threads.
Proceedings of the 14th Euromicro International Conference on Parallel, 2006

Levels in Configurability for CRC Calculation.
Proceedings of the ARCS 2006, 2006

2005
Robust header compression (ROHC) in next-generation network processors.
IEEE/ACM Trans. Netw., 2005

Parallel Processing in Network Processor Architectures (Parallelverarbeitung in Netzwerkprozessorarchitekturen).
it Inf. Technol., 2005

Routing direction determination in regular networks based on configurable circuits.
Future Gener. Comput. Syst., 2005

2004
A Compiler for Mapping a Rule-Based Event-Triggered Program to a Hardware Engine.
Proceedings of the 5th International Workshop on Rule-Based Programming, 2004

Cooperative Software Multithreading to Enhance Utilization of Embedded Processors for Network Applications.
Proceedings of the 12th Euromicro Workshop on Parallel, 2004

Parallelism in a CRC Coprocessor.
Proceedings of the ARCS 2004, 2004

A Comparison of Parallel Programming Models of Network Processors.
Proceedings of the ARCS 2004, 2004

2003
Design methodology for a modular service-driven network processor architecture.
Comput. Networks, 2003

2000
Implementation of Finite Lattices in VLSI for Fault-State Encoding in High-Speed Networks.
Proceedings of the Parallel and Distributed Processing, 2000

Generating Addresses for Multi-dimensional Array Access in FPGA On-chip Memory.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
Low-Level SCI Protocols and Their Application to Flexible Switches.
Proceedings of the SCI: Scalable Coherent Interface, 1999

RUBIN-Lab: Eine Simulationsumgebung für regelbasierte Routing-Algorithmen.
Proceedings of the Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden, 1999

1998
A Flexible Approach for a Fault-Tolerant Router.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

Programming and Implementation of Reconfigurable Routers.
Proceedings of the Field-Programmable Logic and Applications, 1998

1997
Architektur eines flexiblen Routers für Hochleistungsnetzwerke.
Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1996
Deriving Invariants for Cellular Automata.
Proceedings of the Parcella 1996, 1996


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