Gero Dittmann

Orcid: 0000-0002-9112-146X

Affiliations:
  • IBM Research


According to our database1, Gero Dittmann authored at least 26 papers between 2003 and 2022.

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Bibliography

2022
Automating privacy compliance in the decentralized enterprise.
Proceedings of the IEEE International Conference on Big Data, 2022

2021
A Blockchain-Based Crypto-Anchor Platform for Interoperable Product Authentication.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
PUF-derived IoT identities in a zero-knowledge protocol for blockchain.
Internet Things, 2020

2019
Crypto anchors.
IBM J. Res. Dev., 2019

Model-Driven Engineering for Multi-party Interactions on a Blockchain - An Example.
Proceedings of the Service-Oriented Computing - ICSOC 2019 Workshops, 2019

A Blockchain Proxy for Lightweight IoT Devices.
Proceedings of the Crypto Valley Conference on Blockchain Technology, 2019

2018
Analytic Multi-Core Processor Model for Fast Design-Space Exploration.
IEEE Trans. Computers, 2018

Predicting cloud performance for HPC applications before deployment.
Future Gener. Comput. Syst., 2018

2017
Classification of thread profiles for scaling application behavior.
Parallel Comput., 2017

MeSAP: A fast analytic power model for DRAM memories.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Predicting Cloud Performance for HPC Applications: a User-oriented Approach.
Proceedings of the 17th IEEE/ACM International Symposium on Cluster, 2017

2016
Scaling Properties of Parallel Applications to Exascale.
Int. J. Parallel Program., 2016

An Instrumentation Approach for Hardware-Agnostic Software Characterization.
Int. J. Parallel Program., 2016

2015
Quantifying Communication in Graph Analytics.
Proceedings of the High Performance Computing - 30th International Conference, 2015

Analytic processor model for fast design-space exploration.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Scaling application properties to exascale.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation.
Proceedings of the IEEE International Conference on Acoustics, 2014

Holistic power analysis of implementation alternatives for a very large scale synthesis array with phased array stations.
Proceedings of the IEEE International Conference on Acoustics, 2014

2012
Key advances in the presilicon functional verification of the IBM zEnterprise microprocessor and storage hierarchy.
IBM J. Res. Dev., 2012

Simplified Authentication and Authorization for RESTful Services in Trusted Environments.
Proceedings of the Service-Oriented and Cloud Computing - First European Conference, 2012

2008
Exploring power management in multi-core systems.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Performance modeling for early analysis of multi-core systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
On instruction set generation for specialized processors.
PhD thesis, 2006

2005
Robust header compression (ROHC) in next-generation network processors.
IEEE/ACM Trans. Netw., 2005

2004
Organizing Libraries of DFG Patterns.
Proceedings of the 2004 Design, 2004

2003
Design methodology for a modular service-driven network processor architecture.
Comput. Networks, 2003


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