Andrew Bitar

According to our database, Andrew Bitar authored at least 11 papers between 2014 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A software-defined tensor streaming multiprocessor for large-scale machine learning.

Dennis Abts, Garrin Kimmell, Andrew C. Ling, John Kim, Matthew Boyd, Andrew Bitar, Sahil Parmar, Ibrahim Ahmed, Roberto DiCecco, David Han, John Thompson, Michael Bye, Jennifer Hwang, Jeremy Fowers, Peter Lillian, Ashwin Murthy, Elyas Mehtabuddin, Chetan Tekur, Thomas Sohmers, Kris Kang, Stephen Maresh, Jonathan Ross

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

The Groq Software-defined Scale-out Tensor Streaming Multiprocessor : From chips-to-systems architectural overview.

Dennis Abts, John Kim, Garrin Kimmell, Matthew Boyd, Kris Kang, Sahil Parmar, Andrew C. Ling, Andrew Bitar, Ibrahim Ahmed, Jonathan Ross

Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

Challenges/Opportunities to Enable Dependable Scale-out System with Groq Deterministic Tensor-Streaming Processors.

Dennis Abts, Ibrahim Ahmed, Andrew Bitar, Matthew Boyd, John Kim, Garrin Kimmell, Andrew C. Ling

Proceedings of the 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2022

2018

Flexibility: FPGAs and CAD in Deep Learning Acceleration.

Gordon R. Chiu, Andrew C. Ling, Davor Capalija, Andrew Bitar, Mohamed S. Abdelfattah

Proceedings of the 2018 International Symposium on Physical Design, 2018

Harnessing Numerical Flexibility for Deep Learning on FPGAs.

Andrew C. Ling, Mohamed S. Abdelfattah, Shane O'Connell, Andrew Bitar, David Han, Roberto DiCecco, Suchit Subhaschandra, Chris N. Johnson, Dmitry Denisenko, Joshua Fender, Gordon R. Chiu

Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration.

Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O'Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017

Design and Applications for Embedded Networks-on-Chip on FPGAs.

Mohamed S. Abdelfattah, Andrew Bitar, Vaughn Betz

IEEE Trans. Computers, 2017

2015

Bringing programmability to the data plane: Packet processing with a NoC-enhanced FPGA.

Andrew Bitar, Mohamed S. Abdelfattah, Vaughn Betz

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Design and simulation tools for Embedded NOCs on FPGAs.

Mohamed S. Abdelfattah, Andrew Bitar, Ange Yaghi, Vaughn Betz

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Take the Highway: Design for Embedded NoCs on FPGAs.

Mohamed S. Abdelfattah, Andrew Bitar, Vaughn Betz

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

Efficient and programmable ethernet switching with a NoC-enhanced FPGA.

Andrew Bitar, Jeffrey Cassidy, Natalie D. Enright Jerger, Vaughn Betz

Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, 2014