Andrew C. Ling

According to our database, Andrew C. Ling authored at least 24 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A software-defined tensor streaming multiprocessor for large-scale machine learning.

Dennis Abts, Garrin Kimmell, Andrew C. Ling, John Kim, Matthew Boyd, Andrew Bitar, Sahil Parmar, Ibrahim Ahmed, Roberto DiCecco, David Han, John Thompson, Michael Bye, Jennifer Hwang, Jeremy Fowers, Peter Lillian, Ashwin Murthy, Elyas Mehtabuddin, Chetan Tekur, Thomas Sohmers, Kris Kang, Stephen Maresh, Jonathan Ross

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

The Groq Software-defined Scale-out Tensor Streaming Multiprocessor : From chips-to-systems architectural overview.

Dennis Abts, John Kim, Garrin Kimmell, Matthew Boyd, Kris Kang, Sahil Parmar, Andrew C. Ling, Andrew Bitar, Ibrahim Ahmed, Jonathan Ross

Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

Challenges/Opportunities to Enable Dependable Scale-out System with Groq Deterministic Tensor-Streaming Processors.

Dennis Abts, Ibrahim Ahmed, Andrew Bitar, Matthew Boyd, John Kim, Garrin Kimmell, Andrew C. Ling

Proceedings of the 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2022

2018

Flexibility: FPGAs and CAD in Deep Learning Acceleration.

Gordon R. Chiu, Andrew C. Ling, Davor Capalija, Andrew Bitar, Mohamed S. Abdelfattah

Proceedings of the 2018 International Symposium on Physical Design, 2018

Harnessing Numerical Flexibility for Deep Learning on FPGAs.

Andrew C. Ling, Mohamed S. Abdelfattah, Shane O'Connell, Andrew Bitar, David Han, Roberto DiCecco, Suchit Subhaschandra, Chris N. Johnson, Dmitry Denisenko, Joshua Fender, Gordon R. Chiu

Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.

Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration.

Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O'Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).

Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017

Harnessing the Power of FPGAs with the Intel FPGA SDK for OpenCL™.

Byron Sinclair, Andrew C. Ling, Genady Paikin

Proceedings of the 5th International Workshop on OpenCL, 2017

Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.

Andrew C. Ling, Utku Aydonat, Shane O'Connell, Davor Capalija, Gordon R. Chiu

Proceedings of the 5th International Workshop on OpenCL, 2017

Customizable FPGA OpenCL matrix multiply design template for deep neural networks.

Jack Yinger, Eriko Nurvitadhi, Davor Capalija, Andrew C. Ling, Debbie Marr, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra

Proceedings of the International Conference on Field Programmable Technology, 2017

An OpenCL™ Deep Learning Accelerator on Arria 10.

Utku Aydonat, Shane O'Connell, Davor Capalija, Andrew C. Ling, Gordon R. Chiu

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2013

Harnessing the power of FPGAs using altera's OpenCL compiler.

Deshanand P. Singh, Tomasz S. Czajkowski, Andrew C. Ling

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2011

Toward Automated ECOs in FPGAs.

Andrew C. Ling, Stephen Dean Brown, Sean Safarpour, Jianwen Zhu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2010

Towards scalable placement for FPGAs.

Huimin Bian, Andrew C. Ling, Alexander Choong, Jianwen Zhu

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009

Towards automated ECOs in FPGAs.

Andrew C. Ling, Stephen Dean Brown, Jianwen Zhu, Sean Safarpour

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

Scalable Synthesis and Clustering Techniques Using Decision Diagrams.

Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Delay driven AIG restructuring using slack budget management.

Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability.

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Incremental placement for structured ASICs using the transportation problem.

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown

Proceedings of the IFIP VLSI-SoC 2007, 2007

BddCut: Towards Scalable Symbolic Cut Enumeration.

Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005

FPGA Logic Synthesis Using Quantified Boolean Satisfiability.

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown

Proceedings of the Theory and Applications of Satisfiability Testing, 2005

FPGA PLB Evaluation using Quantified Boolean Satisfiability.

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

FPGA technology mapping: a study of optimality.

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown

Proceedings of the 42nd Design Automation Conference, 2005