Davor Capalija

According to our database, Davor Capalija authored at least 12 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Compute Substrate for Software 2.0.

Jasmina Vasiljevic, Ljubisa Bajic, Davor Capalija, Stanislav Sokorac, Dragoljub Ignjatovic, Lejla Bajic, Milos Trajkovic, Ivan Hamer, Ivan Matosevic, Aleksandar Cejkov, Utku Aydonat, Tony Zhou, Syed Zohaib Gilani, Armond Paiva, Joseph Chu, Djordje Maksimovic, Stephen Alexander Chin, Zahi Moudallal, Akhmed Rakhmati, Sean Nijjar, Almeet Bhullar, Boris Drazic, Charles Lee, James Sun, Kei-Ming Kwong, James Connolly, Miles Dooley, Hassan Farooq, Joy Yu Ting Chen, Matthew Walker, Keivan Dabiri, Kyle Mabee, Rakesh Shaji Lal, Namal Rajatheva, Renjith Retnamma, Shripad Karodi, Daniel Rosen, Emilio Munoz, Andrew Lewycky, Aleksandar Knezevic, Raymond Kim, Allan Rui, Alexander Drouillard, David Thompson

IEEE Micro, 2021

2018

Flexibility: FPGAs and CAD in Deep Learning Acceleration.

Gordon R. Chiu, Andrew C. Ling, Davor Capalija, Andrew Bitar, Mohamed S. Abdelfattah

Proceedings of the 2018 International Symposium on Physical Design, 2018

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.

Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).

Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017

Creating High Performance Applications with Intel's FPGA OpenCL™ SDK.

Andrew C. Ling, Utku Aydonat, Shane O'Connell, Davor Capalija, Gordon R. Chiu

Proceedings of the 5th International Workshop on OpenCL, 2017

Customizable FPGA OpenCL matrix multiply design template for deep neural networks.

Jack Yinger, Eriko Nurvitadhi, Davor Capalija, Andrew C. Ling, Debbie Marr, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra

Proceedings of the International Conference on Field Programmable Technology, 2017

An OpenCL™ Deep Learning Accelerator on Arria 10.

Utku Aydonat, Shane O'Connell, Davor Capalija, Andrew C. Ling, Gordon R. Chiu

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2014

Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays.

Davor Capalija, Tarek S. Abdelrahman

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013

Microarchitecture of a Coarse-Grain Out-of-Order Superscalar Processor.

Davor Capalija, Tarek S. Abdelrahman

IEEE Trans. Parallel Distributed Syst., 2013

A high-performance overlay architecture for pipelined execution of data flow graphs.

Davor Capalija, Tarek S. Abdelrahman

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2011

Towards Synthesis-Free JIT Compilation to Commodity FPGAs.

Davor Capalija, Tarek S. Abdelrahman

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2006

A Multithreaded Soft Processor for SoPC Area Reduction.

Blair Fort, Davor Capalija, Zvonko G. Vranesic, Stephen Dean Brown

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006