Anugerah Firdauzi

According to our database1, Anugerah Firdauzi authored at least 5 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2019
Type-I Digital Ring-Based PLL Using Loop Delay Compensation and ADC-Based Sampling Phase Detector.
IEICE Trans. Electron., 2019

2018
A 14-b, 850fs Fully Synthesizable Stochastic-Based Branching Time-to-Digital Converter in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
High Resolution Mixed-Domain Delta-Sigma Time-to-Digital Converter Using Compensated Charge-Pump Integrator.
IEICE Trans. Electron., 2017

2016
A 74.9 dB SNDR 1 MHz bandwidth 0.9 mW delta-sigma time-to-digital converter using charge pump and SAR ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 2 GHz 3.1 mW type-I digital ring-based PLL.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016


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