Anurag Negi

According to our database1, Anurag Negi authored at least 14 papers between 2010 and 2014.

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Bibliography

2014
ZEBRA: Data-Centric Contention Management in Hardware Transactional Memory.
IEEE Trans. Parallel Distrib. Syst., 2014

Performance and Energy Analysis of the Restricted Transactional Memory Implementation on Haswell.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

2013
Eager Beats Lazy: Improving Store Management in Eager Hardware Transactional Memory.
IEEE Trans. Parallel Distrib. Syst., 2013

SCIN-cache: Fast speculative versioning in multithreaded cores.
TACO, 2013

Techniques to improve performance in requester-wins hardware transactional memory.
TACO, 2013

Efficient Forwarding of Producer-Consumer Data in Task-Based Programs.
Proceedings of the 42nd International Conference on Parallel Processing, 2013

HARP: Adaptive abort recurrence prediction for Hardware Transactional Memory.
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

2012
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Transactional prefetching: narrowing the window of contention in hardware transactional memory.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
The Impact of Non-coherent Buffers on Lazy Hardware Transactional Memory Systems.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

ZEBRA: a data-centric, hybrid-policy hardware transactional memory design.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

Eager Meets Lazy: The Impact of Write-Buffering on Hardware Transactional Memory.
Proceedings of the International Conference on Parallel Processing, 2011

Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
LV*: A low complexity lazy versioning HTM infrastructure.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010


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