J. Rubén Titos Gil
According to our database1,
J. Rubén Titos Gil
authored at least 30 papers
between 2008 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
IEEE Trans. Parallel Distributed Syst., 2020
J. Parallel Distributed Comput., 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
2017
Proceedings of the International Conference on Supercomputing, 2017
2016
J. Parallel Distributed Comput., 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the Handbook on Data Centers, 2015
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers.
Microprocess. Microsystems, 2015
Proceedings of the 44th International Conference on Parallel Processing, 2015
Proceedings of the 44th International Conference on Parallel Processing, 2015
2014
IEEE Trans. Parallel Distributed Syst., 2014
Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems.
J. Supercomput., 2014
Performance and Energy Analysis of the Restricted Transactional Memory Implementation on Haswell.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014
2013
IEEE Trans. Parallel Distributed Syst., 2013
IEEE Trans. Parallel Distributed Syst., 2013
ACM Trans. Archit. Code Optim., 2013
ACM Trans. Archit. Code Optim., 2013
Concurr. Comput. Pract. Exp., 2013
2012
ACM Trans. Archit. Code Optim., 2012
Dynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems.
Proceedings of the 20th Euromicro International Conference on Parallel, 2012
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012
2011
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
Proceedings of the International Conference on Parallel Processing, 2011
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2010
Proceedings of the 22st International Symposium on Computer Architecture and High Performance Computing, 2010
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
2008
Proceedings of the 16th Euromicro International Conference on Parallel, 2008
Proceedings of the High Performance Computing, 2008