Omid Kavehei

According to our database1, Omid Kavehei authored at least 56 papers between 2007 and 2020.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2020
Epileptic Seizure Classification With Symmetric and Hybrid Bilinear Models.
IEEE J. Biomed. Health Informatics, 2020

Nonlinear retinal response modeling for future neuromorphic instrumentation.
IEEE Instrum. Meas. Mag., 2020

2019
Machine Learning Cryptanalysis of a Quantum Random Number Generator.
IEEE Trans. Inf. Forensics Secur., 2019

Nano-Intrinsic True Random Number Generation: A Device to Data Study.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Epileptic Seizure Forecasting With Generative Adversarial Networks.
IEEE Access, 2019

Hash Functions and Benchmarks for Resource Constrained Passive Devices: A Preliminary Study.
Proceedings of the IEEE International Conference on Pervasive Computing and Communications Workshops, 2019

Semi-supervised Seizure Prediction with Generative Adversarial Networks.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

Low Precision Electroencephalogram for Seizure Detection with Convolutional Neural Network.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

Memristive In Situ Computing.
Proceedings of the Handbook of Memristor Networks., 2019

2018
A Physical Unclonable Function With Redox-Based Nanoionic Resistive Memory.
IEEE Trans. Inf. Forensics Secur., 2018

Convolutional neural networks for seizure prediction using intracranial and scalp electroencephalogram.
Neural Networks, 2018

Efficient Erasable PUFs from Programmable Logic and Memristors.
IACR Cryptol. ePrint Arch., 2018

Integer Convolutional Neural Network for Seizure Detection.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

SecuCode: Intrinsic PUF Entangled Secure Wireless Code Dissemination for Computational RFID Devices.
CoRR, 2018

Semi-supervised Seizure Prediction with Generative Adversarial Networks.
CoRR, 2018

2017
Accurate charge transport model for nanoionic memristive devices.
Microelectron. J., 2017

Supervised learning in automatic channel selection for epileptic seizure detection.
Expert Syst. Appl., 2017

A Generalised Seizure Prediction with Convolutional Neural Networks for Intracranial and Scalp Electroencephalogram Data Analysis.
CoRR, 2017

Nano-Intrinsic True Random Number Generation.
CoRR, 2017

R<sup>3</sup>PUF: A Highly Reliable Memristive Device based Reconfigurable PUF.
CoRR, 2017

A PUF sensor: Securing physical measurements.
Proceedings of the 2017 IEEE International Conference on Pervasive Computing and Communications Workshops, 2017

Utilizing I-V non-linearity and analog state variations in ReRAM-based security primitives.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016
Read operation performance of large selectorless cross-point array with self-rectifying memristive device.
Integr., 2016

Highly-Secure Physically Unclonable Cryptographic Primitives Using Nonlinear Conductance and Analog State Tuning in Memristive Crossbar Arrays.
CoRR, 2016

Emerging Physical Unclonable Functions With Nanotechnology.
IEEE Access, 2016

Obfuscated challenge-response: A secure lightweight authentication mechanism for PUF-based pervasive devices.
Proceedings of the 2016 IEEE International Conference on Pervasive Computing and Communication Workshops, 2016

2015
A Challenge Obfuscation Method for Thwarting Model Building Attacks on PUFs.
IACR Cryptol. ePrint Arch., 2015

Guest Editorial Solid-state Memristive Devices and Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Future Large-Scale Memristive Device Crossbar Arrays: Limits Imposed by Sneak-Path Currents on Read Operations.
CoRR, 2015

mrPUF: A Novel Memristive Device Based Physical Unclonable Function.
Proceedings of the Applied Cryptography and Network Security, 2015

2014
High Fill Factor Low-Voltage CMOS Image Sensor Based on Time-to-Threshold PWM VLSI Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A Complete 256-Electrode Retinal Prosthesis Chip.
IEEE J. Solid State Circuits, 2014

Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Highly scalable neuromorphic hardware with 1-bit stochastic nano-synapses.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
mrPUF: A Memristive Device based Physical Unclonable Function
CoRR, 2013

A flexible biphasic pulse generating and accurate charge balancing stimulator with a 1μW neural recording amplifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A charge-balanced 4-wire interface for the interconnections of biomedical implants.
Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013

2012
Memristive Device Fundamentals and Modeling: Applications to Circuits and Systems Simulation.
Proc. IEEE, 2012

A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders
CoRR, 2012

Live demonstration: High fill factor CIS based on single inverter architecture.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Emergence of competitive control in a memristor-based neuromorphic circuit.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

A precise charge balancing and compliance voltage monitoring stimulator front-end for 1024-electrodes retinal prosthesis.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

2011
Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines.
IEEE Trans. Very Large Scale Integr. Syst., 2011

High-speed full adder based on minority function and bridge style for nanoscale.
Integr., 2011

Memristor-based Synaptic Networks and Logical Operations Using In-Situ Computing
CoRR, 2011

High Density and Non-volatile CRS-based CAM
CoRR, 2011

An Analytical Approach for Memristive Nanoarchitectures
CoRR, 2011

2010
Efficient Reverse Converter Designs for the New 4-Moduli Sets 2<sup>n</sup> -1, 2<sup>n</sup>, 2<sup>n</sup> +1, 2<sup>2n + 1</sup>-1 and 2<sup>n</sup> -1, 2<sup>n</sup> +1, 2<sup>2n</sup>, 2<sup>2n</sup> +1 Based on New CRTs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

3-D System-on-System (SoS) Biomedical-Imaging Architecture for Health-Care Applications.
IEEE Trans. Biomed. Circuits Syst., 2010

2009
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter.
Microelectron. J., 2009

A novel low-power full-adder cell for low voltage.
Integr., 2009

Maximally Redundant High-Radix Signed-Digit Adder: New Algorithm and Implementation.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

2008
Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell.
J. Comput., 2008

Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007
A Novel CMOS Full Adder.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

A New Design for 7: 2 Compressors.
Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007


  Loading...