Azam Seyedi

According to our database1, Azam Seyedi authored at least 7 papers between 2011 and 2015.

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Timeline

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Bibliography

2015
NEMsCAM: A novel CAM cell based on nano-electro-mechanical switch and CMOS for energy efficient TLBs.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

2014
Flexicache: Highly Reliable and Low Power Cache under Supply Voltage Scaling.
Proceedings of the High Performance Computing - First HPCLATAM, 2014

2013
Circuit design of a novel adaptable and reliable L1 data cache.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

2012
Circuit design of a dual-versioning L1 data cache.
Integration, 2012

Novel SRAM bias control circuits for a low power L1 data cache.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

2011
Circuit design of a dual-versioning L1 data cache for optimistic concurrency.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011


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