B. Lasbouygues

According to our database1, B. Lasbouygues authored at least 8 papers between 2003 and 2007.

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Bibliography

2007
Temperature- and Voltage-Aware Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Temperature and voltage aware timing analysis: application to voltage drops.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Logical effort model extension to propagation delay representation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Timing analysis in presence of supply voltage and temperature variations.
Proceedings of the 2006 International Symposium on Physical Design, 2006

2005
Temperature Dependency in UDSM Process.
Proceedings of the Integrated Circuit and System Design, 2005

2004
Physical Extension of the Logical Effort Model.
Proceedings of the Integrated Circuit and System Design, 2004

Temperature Dependence in Low Power CMOS UDSM Process.
Proceedings of the Integrated Circuit and System Design, 2004

2003
Continuous representation of the performance of a CMOS library.
Proceedings of the ESSCIRC 2003, 2003


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