Barbara Jobstmann

Affiliations:
  • EPFL, Switzerland
  • IMAG, Grenoble, France (former)


According to our database1, Barbara Jobstmann authored at least 37 papers between 2005 and 2018.

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Bibliography

2018
Graph Games and Reactive Synthesis.
Proceedings of the Handbook of Model Checking., 2018

2016
Synthesizing efficient systems in probabilistic environments.
Acta Informatica, 2016

2015
Measuring and Synthesizing Systems in Probabilistic Environments.
J. ACM, 2015

Program repair without regret.
Formal Methods Syst. Des., 2015

FudgeFactor: Syntax-Guided Synthesis for Accurate RTL Error Localization and Correction.
Proceedings of the Hardware and Software: Verification and Testing, 2015

2014
Synthesizing robust systems.
Acta Informatica, 2014

2013
Algorithmic program synthesis: introduction.
Int. J. Softw. Tools Technol. Transf., 2013

Preface.
Proceedings of the Formal Methods in Computer-Aided Design, 2013

2012
Finding and fixing faults.
J. Comput. Syst. Sci., 2012

Synthesis of Reactive(1) designs.
J. Comput. Syst. Sci., 2012

Divide and Conquer: the Quest for Compositional Design and Analysis (Dagstuhl Seminar 12511).
Dagstuhl Reports, 2012

Synthesizing Efficient Controllers.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2012

2011
Formalisms for Specifying Markovian Population Models.
Int. J. Found. Comput. Sci., 2011

Synthesizing Systems with Optimal Average-Case Behavior for Ratio Objectives
Proceedings of the Proceedings International Workshop on Interactions, Games and Protocols, 2011

On the Hardness of Priority Synthesis.
Proceedings of the Implementation and Application of Automata, 2011

QUASY: Quantitative Synthesis Tool.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2011

Specification-centered robustness.
Proceedings of the Industrial Embedded Systems (SIES), 2011

Model Construction and Priority Synthesis for Simple Interaction Systems.
Proceedings of the NASA Formal Methods, 2011

Algorithms for Synthesizing Priorities in Component-Based Systems.
Proceedings of the Automated Technology for Verification and Analysis, 2011

2010
Message from the chairs.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Synthesis for regular specifications over unbounded domains.
Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

Robustness with Respect to Error Specifications.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

Gist: A Solver for Probabilistic Games.
Proceedings of the Computer Aided Verification, 22nd International Conference, 2010

Robustness in the Presence of Liveness.
Proceedings of the Computer Aided Verification, 22nd International Conference, 2010

2009
Synthesizing robust systems.
Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

Better Quality in Synthesis through Quantitative Objectives.
Proceedings of the Computer Aided Verification, 21st International Conference, 2009

Instantaneous Soundness Checking of Industrial Business Process Models.
Proceedings of the Business Process Management, 7th International Conference, 2009

2008
Model checking transactional memories.
Proceedings of the ACM SIGPLAN 2008 Conference on Programming Language Design and Implementation, 2008

Open Implication.
Proceedings of the Automata, Languages and Programming, 35th International Colloquium, 2008

Interface theories with component reuse.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

Environment Assumptions for Synthesis.
Proceedings of the CONCUR 2008 - Concurrency Theory, 19th International Conference, 2008

2007
Specify, Compile, Run: Hardware from PSL.
Proceedings of the Workshop on Compiler Optimization meets Compiler Verification, 2007

Interactive presentation: Automatic hardware synthesis from specifications: a case study.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Anzu: A Tool for Property Synthesis.
Proceedings of the Computer Aided Verification, 19th International Conference, 2007

2006
Optimizations for LTL Synthesis.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

2005
Finding and Fixing Faults.
Proceedings of the Correct Hardware Design and Verification Methods, 2005

Program Repair as a Game.
Proceedings of the Computer Aided Verification, 17th International Conference, 2005


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