Bart R. Zeydel

According to our database1, Bart R. Zeydel authored at least 14 papers between 2003 and 2010.

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Bibliography

2010
Energy-Efficient Design Methodologies: High-Performance VLSI Adders.
IEEE J. Solid State Circuits, 2010

2007
Logic Style Comparison for Ultra Low Power Operation in 65nm Technology.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2006
Energy optimization of pipelined digital systems using circuit sizing and supply scaling.
IEEE Trans. Very Large Scale Integr. Syst., 2006

A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS.
IEEE J. Solid State Circuits, 2006

Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Circuit Design Style for Energy Efficiency: LSDL and Compound Domino.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2005
Comparison of high-performance VLSI adders in the energy-delay space.
IEEE Trans. Very Large Scale Integr. Syst., 2005

Low- and Ultra Low-Power Arithmetic Units: Design and Comparison.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Architectural Considerations for Energy Efficiency.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Efficient Mapping of Addition Recurrence Algorithms in CMOS.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2003
Energy Optimization of High-Performance Circuits.
Proceedings of the Integrated Circuit and System Design, 2003

Energy minimization method for optimal energy-delay extraction.
Proceedings of the ESSCIRC 2003, 2003

Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003


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