Bertil Svensson

According to our database1, Bertil Svensson authored at least 50 papers between 1983 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
The Harmonized Parabolic Synthesis Methodology for Hardware Efficient Function Generation with Full Error Control.
Signal Processing Systems, 2018

Forecasting Solar Activity With Computational Intelligence Models.
IEEE Access, 2018

2016
A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing.
TRETS, 2016

Combining the parabolic synthesis methodology with second-degree interpolation.
Microprocessors and Microsystems - Embedded Hardware Design, 2016

2015
Towards teaching embedded parallel computing: an analytical approach.
Proceedings of the Workshop on Computer Architecture Education, 2015

Prediction of solar cycle 24.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

A New Computational Intelligence Model for Long-Term Prediction of Solar and Geomagnetic Activity.
Proceedings of the Twenty-Ninth AAAI Conference on Artificial Intelligence, 2015

2014
A running leap for embedded signal processing to future parallel platforms.
Proceedings of the WISE'14, 2014

Neuro-fuzzy models for geomagnetic storms prediction: Using the auroral electrojet index.
Proceedings of the 10th International Conference on Natural Computation, 2014

A Brain Emotional Learning-based Prediction Model A Brain Emotional Learning-based Prediction Model For the Prediction of Geomagnetic Storms.
Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

Realizing Efficient Execution of Dataflow Actors on Manycores.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

2013
Energy-Efficient Synthetic-Aperture Radar Processing on a Manycore Architecture.
Proceedings of the 42nd International Conference on Parallel Processing, 2013

An Evaluation of High-Performance Embedded Processing on MPPAs.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

Programming Real-Time Image Processing for Manycores in a High-Level Language.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2012
Occam-pi for Programming of Massively Parallel Reconfigurable Architectures.
Int. J. Reconfig. Comp., 2012

Parallelization of the estimation algorithm of the 3D structure tensor.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Occam-pi as a High-Level Language for Coarse-Grained Reconfigurable Architectures.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Programming Real-Time Autofocus on a Massively Parallel Reconfigurable Architecture Using Occam-pi.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010
An Energy and Application Scenario Aware Active RFID Protocol.
EURASIP J. Wireless Comm. and Networking, 2010

2009
Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing.
Microprocessors and Microsystems - Embedded Hardware Design, 2009

Manycore performance analysis using timed configuration graphs.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

2008
A domain-specific approach for software development on Manycore platforms.
SIGARCH Computer Architecture News, 2008

Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols.
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

Using a CSP Based Programming Model for Reconfigurable Processor Arrays.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007
Protocols for Active RFID - The Energy Consumption Aspect.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

A Study of Design Efficiency with a High-Level Language for FPGAs.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Architectural Challenges in Memory-Intensive, Real-Time Image Forming.
Proceedings of the 2007 International Conference on Parallel Processing (ICPP 2007), 2007

2006
Towards an Energy Efficient Protocol for Active RFID.
Proceedings of the International Symposium on Industrial Embedded Systems, 2006

A configurable framework for stream programming exploration in baseband applications.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Using Dual-Radio Nodes to Enable Quality of Service in a Clustered Wireless Mesh Network.
Proceedings of 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006

2005
Analyzing the Advantages of Run-Time Reconfiguration in Radar Signal Processing.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005

Meeting Engineer Efficiency Requirements in Highly Parallel Signal Processing by using Platforms.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005

Compiling Stream-Language Applications to a Reconfigurable Array Processor.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

2004
Two-level Reconfigurable Architecture for High-Performance Signal Processing.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2003
Capacity limitations in wireless sensor networks.
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003

Key Issues in Implementing an Optoelectronic Planar Free-space Architecture for Signal Processing Applications.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003

2001
Radar Signal Processing Using Pipelines Optical Hypercube Interconnects.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

1999
Navigating with a Focus-Directed Mapping Network.
Auton. Robots, 1999

1998
Editorial.
Real-Time Systems, 1998

Self-Orienting with On-Line Learning of Environmental Features.
Adaptive Behaviour, 1998

The VEGA Moderately Parallel MIMD, Moderately Parallel SIMD, Architectures for High Performance Array Signal Processing.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

A Low-Risk Approach to Mobile Robot Path Planning.
Proceedings of the Tasks and Methods in Applied Artificial Intelligence, 1998

1997
Fiber-Ribbon Pipeline Ring Network for High-Performance Distributed Computing Systems.
Proceedings of the 1997 International Symposium on Parallel Architectures, 1997

1993
A processor array module for distributed, massively parallel, embedded computing.
Microprocessing and Microprogramming, 1993

An architecture for time-critical distributed/parallel processing.
Proceedings of the 1993 Euromicro Workshop on Parallel and Distributed Processing, 1993

1992
Using and Designing Massively Parallel Computers for Artificial Neural Neural Networks.
J. Parallel Distrib. Comput., 1992

1990
Execution of neural network algorithms on an array of bit-serial processors.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

1986
LUCAS Associative Array Processor: Design., Programming and Application Studies
Lecture Notes in Computer Science 216, Springer, ISBN: 3-540-16445-6, 1986

1983
Matrix multiplication on LUCAS.
Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983


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